參數(shù)資料
型號(hào)： SAA7392HL
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： Channel encoder/decoder CDR60
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝： 12 X 12 MM, 1.40 MM HEIGHT, PLASTIC, MS-026, SOT-315-1, LQFP-80
文件頁(yè)數(shù)： 42/76頁(yè)
文件大?。?/td> 246K
代理商： SAA7392HL
2000 Mar 21
42
Philips Semiconductors
Preliminary specification
Channel encoder/decoder CDR60
SAA7392
Table 78
Selection of coefficient K
f’
and K
i’
7.10.4
M
OTOR
C
ONTROL
R
EGISTER
3 (M
OTOR
3)
The function of this register is dependent upon whether its being read or written.
Whenwritten, the value determinesthe FIFO set-point valuein C1 frames (oneC1 frame is24 bytes). The FIFO set-point
value should be set to a value greater than 110 frames for CD Fast mode and greater than 219 frames for CD Normal
mode. The maximum value for the FIFO half-full value is 256. Normally, the FIFO set-point value should be set to the
minimum value plus a margin for disc overspeed. The set-point value is calculated as shown below:
FIFO set-point value = HFSP<7:0>
×
8.
When read, the motor speed can be determined from the recovered tacho frequency. Note this information is only valid
when a Hall motor is being used in the application and the tacho subsystem is correctly configured. The reading is related
to the motor frequency (relative to pulse rate on a single tacho input pin) as shown in Equation (1); the actual Tacho
frequency can be calculated as shown in Equation (2). Negative frequencies will be measured if the motor is rotating in
reverse.
Tacho1
×
)
Motor frequency
×
]
Tacho sample rate
(1)
(2)
Table 79
Motor Control Register 3 (address 0EH) - WRITE/READ
Table 80
Description of Tacho4 bits for read operation
Kf’.2
Kf’.1
Kf’.0
COEFFICIENTS K
f’
AND K
i’
Ki’.2
Ki’.1
Ki’.0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1
0.5
0.25
0.125
0.0625
0.03125
0.015625
0.0078125
7
6
5
4
3
2
1
0
HFSP.7
TachoFreq.7
HFSP.6
TachoFreq.6
HFSP.5
TachoFreq.5
HFSP.4
TachoFreq.4
HFSP.3
TachoFreq.3
HFSP.2
TachoFreq.2
HFSP.1
TachoFreq.1
HFSP.0
TachoFreq.0
BIT
SYMBOL
DESCRIPTION
7 to 0
TachoFreq<7:0>
These 8 bits indicate the Tacho frequency (2’s complement notation).
Tacho4
-----6
=
Tacho frequency (Hz)
Tacho4
128
ADC clock
×
=
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