參數(shù)資料
型號(hào)： PI7C7100BNA
英文描述： PCI Bus Interface/Controller
中文描述： PCI總線接口/控制器
文件頁(yè)數(shù)： 8/118頁(yè)
文件大?。?/td> 2962K
代理商： PI7C7100BNA
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05/08/00
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PI7C7100
ADVANCE INFORMATION
Appendix A - Timing Diagrams
1. Configuration Read Transaction .................................................................................................................................A-3
2. Configuration Write Transaction ................................................................................................................................A-3
3. Type 1 to Type 0 Configuration Read Transaction (P
→
S) ......................................................................................A-3
4. Type 1 to Type 0 Configuration Write Transaction (P
→
S) .....................................................................................A-4
5. Upstream Type 1 to Special Cycle Transaction (S
→
P).............................................................................................A-4
6. Downstream Type 1 to Special Cycle Transaction (P
→
S) ........................................................................................A-5
7. Downstream Type 1 to Type 1 Configuration Read Transaction (P
→
S) ..................................................................A-5
8. Downstream Type 1 to Type 1 Configuration Write Transaction (P
→
S) .................................................................A-6
9. Upstream Delayed Burst Memory Read Transaction (S
→
P) ...................................................................................A-6
10. Downstream Delayed Burst Memory Read Transaction (P
→
S) ..............................................................................A-7
11. Downstream Delayed Memory Read Transaction (P/33MHz
→
S/33MHz)...............................................................A-7
12. Downstream Delayed Memory Read Transaction (S2/33MHz
→
S1/33MHz)...........................................................A-8
13. Downstream Delayed Memory Read Transaction (S1/33MHz
→
S2/33MHz)...........................................................A-8
14. Upstream Delayed Memory Read Transaction (S/33MHz
→
P/33MHz) ...................................................................A-9
15. Downstream Posted Memory Write Transaction (P/33MHz
→
S/33MHz)................................................................A-9
16. Downstream Posted Memory Write Transaction (S2/33MHz
→
S1/33MHz) ...........................................................A-10
17. Downstream Posted Memory Write Transaction (S1/33MHz
→
S2/33MHz) ...........................................................A-10
18. Upstream Posted Memory Write Transaction (S/33MHz
→
P/33MHz) ...................................................................A-11
19. Downstream Flow-Through Posted Memory Write Transaction (P/33MHz
→
S/33MHz)........................................A-11
20. Downstream Flow-Through Posted Memory Write Transaction (S2/33MHz
→
S1/33MHz)....................................A-12
21. Downstream Flow-Through Posted Memory Write Transaction (S1/33MHz
→
S2/33MHz)....................................A-12
22. Upstream Flow-Through Posted Memory Write Transaction (S/33MHz
→
P/33MHz) ............................................A-13
23. Downstream Delayed I/O Read Transaction (P
→
S) ...............................................................................................A-13
24. Downstream Delayed I/O Read Transaction (S2/33MHz
→
S1/33MHz) ..................................................................A-14
25. Downstream Delayed I/O Read Transaction (S1/33MHz
→
S2/33MHz) ..................................................................A-14
26. Downstream Delayed I/O Read Transaction (S/33MHz
→
P/33MHz) ......................................................................A-15
27. Downstream Delayed I/O Write Transaction (P
→
S) ..............................................................................................A-15
28. Downstream Delayed I/O Write Transaction (S2/33MHz
→
S1/33MHz) .................................................................A-16
29. Downstream Delayed I/O Write Transaction (S1/33MHz
→
S2/33MHz) .................................................................A-16
30. Upstream Delayed I/O Write Transaction (S
→
P) ...................................................................................................A-17
Appendix B - Evaluation Board User's Manual
General Information ........................................................................................................................................................... B-3
Frequently Asked Questions ............................................................................................................................................ B-5
Appendix C - Three-Port PCI Bridge Evaluation Board Schematics
PCI Chip ............................................................................................................................................................................. C-3
PCI Edge Connector .......................................................................................................................................................... C-4
Secondary 1 PCI Bus ......................................................................................................................................................... C-5
Secondary 2 PCI Bus ......................................................................................................................................................... C-6
Top View............................................................................................................................................................................ C-7
相關(guān)PDF資料
PDF描述
PI7C7100 3-Port PCI Bridge
PI7C7100CNA 3-Port PCI Bridge
PI7C7300 3-PORT PCI-to-PCI BRIDGE
PI7C7300A 3-PORT PCI-to-PCI BRIDGE
PI7C7300ANA 3-PORT PCI-to-PCI BRIDGE
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C7100CNA 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:3-Port PCI Bridge
PI7C7300 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE
PI7C7300A 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE
PI7C7300AEVB-3 功能描述:界面開(kāi)發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評(píng)估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C7300ANA 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA
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