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參數(shù)資料
| 型號(hào)： | PI7C7100BNA |
| 英文描述： | PCI Bus Interface/Controller |
| 中文描述： | PCI總線接口/控制器 |
| 文件頁(yè)數(shù)： | 25/118頁(yè) |
| 文件大?。?/td> | 2962K |
| 代理商： | PI7C7100BNA |
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PI7C7100
ADVANCE INFORMATION
Type 0 configuration write and read transactions do not use data buffers; that is, these transactions are completed
immediately, regardless of the state of the data buffers. The PI7C7100 ignores all Type 0 transactions initiated on the
secondary interface.
4.7.2 Type 1 to Type 0 Conversion
Type 1 configuration transactions are used specifically for device configuration in a hierarchical PCI bus system. A PCI-
to-PCI bridge is the only type of device that should respond to a Type 1 configuration command. Type 1 configuration
commands are used when the configuration access is intended for a PCI device that resides on a PCI bus other than
the one where the Type 1 transaction is generated.
PI7C7100 performs a Type 1 to Type 0 translation when the Type 1 transaction is generated on the primary bus and
is intended for a device attached directly to the secondary bus. PI7C7100 must convert the configuration command to
a Type 0 format so that the secondary bus device can respond to it. Type 1 to Type 0 translations are performed only
in the downstream direction; that is, PI7C7100 generates a Type 0 transaction only on the secondary bus, and never
on the primary bus.
PI7C7100 responds to a Type 1 configuration transaction and translates it into a Type 0 transaction on the secondary
bus when the following conditions are met during the address phase:
The lowest two address bits on P_AD[1:0] are 01b.
The bus number in address field P_AD[23:16] is equal to the value in the secondary bus number register in
configuration space.
The bus command on P_CBE[3:0] is a configuration read or configuration write transaction.
When PI7C7100 translates the Type 1 transaction to a Type 0 transaction on the secondary interface, it
performs the following translations to the address:
Sets the lowest two address bits on S1_AD[1:0] or S2_AD[1:0] to 00b.
Decodes the device number and drives the bit pattern specified in Table 46 on S1_AD[31:16] or S2_AD[31:16]
for the purpose of asserting the devices IDSEL signal.
Sets S1_AD[15:11] or S2_AD[15:11] to 0.
Leaves unchanged the function number and register number fields.
PI7C7100 asserts a unique address line based on the device number. These address lines may be used as secondary
bus IDSEL signals. The mapping of the address lines depends on the device number in the Type 1 address bits
P_AD[15:11]. Table 46 presents the mapping that PI7C7100 uses
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PI7C7100 | 3-Port PCI Bridge |
| PI7C7100CNA | 3-Port PCI Bridge |
| PI7C7300 | 3-PORT PCI-to-PCI BRIDGE |
| PI7C7300A | 3-PORT PCI-to-PCI BRIDGE |
| PI7C7300ANA | 3-PORT PCI-to-PCI BRIDGE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PI7C7100CNA | 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:3-Port PCI Bridge |
| PI7C7300 | 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE |
| PI7C7300A | 制造商:PERICOM 制造商全稱(chēng):Pericom Semiconductor Corporation 功能描述:3-PORT PCI-to-PCI BRIDGE |
| PI7C7300AEVB-3 | 功能描述:界面開(kāi)發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類(lèi)型:RS-485 工具用于評(píng)估:ADM3485E 接口類(lèi)型:RS-485 工作電源電壓:3.3 V |
| PI7C7300ANA | 制造商:Pericom Semiconductor Corporation 功能描述:PCI-to-PCI Bridge 272-Pin BGA 制造商:Pericom Semiconductor Corporation 功能描述:PCI to PCI Bridge 272-Pin BGA |
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