參數(shù)資料
型號: PCA5007H
廠商: NXP Semiconductors N.V.
英文描述: Pager baseband controller
中文描述: 傳呼機基帶控制器
文件頁數(shù): 96/112頁
文件大?。?/td> 604K
代理商: PCA5007H
1998 Oct 07
96
Philips Semiconductors
Product specification
Pager baseband controller
PCA5007
15 APPENDIX 2: THE PARALLEL PROGRAMMING
MODE
15.1
Introduction
This section describes the parallel programming mode of
the PCA5007. Parallel programming mode is the mode
where the OTP is programmed by an EPROM
programmer or by a tester.
15.2
General description
The PCA5007 is packaged in a LQFP48 package. Port 0
and Port 2 are available for programming. To program the
OTP of the PCA5007, multiplexing of addresses and data
is necessary. Port 0 is a bidirectional data port, used for
the memory addresses and the program and verify data.
Port 2 is an input port which controls the parallel
programming mode. A coarse block diagram of the OTP
interface in parallel programming mode is given in Fig.60.
Fig.60 The OTP interface in parallel programming mode.
handbook, full pagewidth
MGR163
TEST
CONTROL
ADDL
LATCH
ADDH
LATCH
CONTROL
LOGIC
P0
P2
OTP INTERFACE
parallel programming mode
normal
mode
CTRL
ADDR
DO
(80C51)
CONTROL
DO
DI
ADD
(OTP)
OTPIF
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