參數(shù)資料
型號: PCA5007H
廠商: NXP Semiconductors N.V.
英文描述: Pager baseband controller
中文描述: 傳呼機(jī)基帶控制器
文件頁數(shù): 71/112頁
文件大?。?/td> 604K
代理商: PCA5007H
1998 Oct 07
71
Philips Semiconductors
Product specification
Pager baseband controller
PCA5007
Notes
1.
This opcode works in a slightly different way to a standard 80C51 CPU. If the direct field addresses one of the I/O
ports (P0 to P3) then the standard 80C51 uses the port pin input state for the operation while the PCA5007 uses the
SFR contents.
This opcode works in a slightly different way to a standard 80C51 CPU. If the direct bit field addresses one of the
port bits, then the state of the corresponding port pin is written to the port SFR after execution of the instruction.
2.
ANL
ANL
ORL
(2)
ORL
MOV
MOV
C,bit
C,/bit
C,bit
C,/bit
C,bit
bit,C
AND direct bit to carry flag
AND complement of direct bit to carry flag
OR direct bit to carry flag
OR complement of direct bit to carry flag
move direct bit to carry flag
move carry flag to direct bit
2
2
2
2
2
2
0.540
0.563
0.561
0.561
0.610
0.610
2.187
2.388
2.341
2.341
2.542
2.542
82
B0
72
A0
A2
92
Program and machine control
ACALL addr11
LCALL
RET
RETI
AJMP
LJMP
SJMP
JMP
JZ
JNZ
JC
JNC
JB
JNB
JBC
CJNE
CJNE
absolute subroutine call
long subroutine call
return from subroutine
return from interrupt
absolute jump
long jump
short jump (relative address)
jump indirect relative to the DPTR
jump if A is zero
jump if A is not zero
jump if carry flag is set
jump if carry flag is not set
jump if direct bit is set
jump if direct bit is not set
jump if direct bit is set and clear bit
compare direct to A and jump if not equal
compare immediate to A and jump if not
equal
compare immediate to register and jump if
not equal
compare immediate to indirect and jump if
not equal
decrement register and jump if not zero
decrement direct and jump if not zero
no operation
2
3
1
1
2
3
2
1
2
2
2
2
3
3
3
3
3
0.840
1.082
1.082
1.082
0.670
0.840
0.670
1.049
0.639
0.754
0.620
0.733
0.788
0.902
0.894
0.855
0.794
3.384
4.562
4.562
4.562
2.524
3.384
2.524
4.015
2.224
2.896
2.128
2.705
3.095
3.708
3.520
3.307
3.024
1 addr
12
22
32
1 addr
02
80
73
60
70
40
50
20
30
10
B5
B4
addr16
addr11
addr16
rel
@A+DPTR
rel
rel
rel
rel
bit,rel
bit,rel
bit,rel
A,direct,rel
A,#data,rel
CJNE
Rn,#data,rel
3
0.787
3.139
B*
CJNE
@Ri,#data,rel
3
0.822
3.333
B6, B7
DJNZ
DJNZ
NOP
Rn,rel
direct,rel
2
3
1
0.857
0.991
0.284
3.474
4.178
1.027
D*
D5
00
MNEMONIC
DESCRIPTION
BYTES
EXEC.
TIME
(
μ
s)
ENERGY
[NJ]
OPCODE
(HEX)
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