參數(shù)資料
型號(hào): PCA5007H
廠商: NXP Semiconductors N.V.
英文描述: Pager baseband controller
中文描述: 傳呼機(jī)基帶控制器
文件頁(yè)數(shù): 44/112頁(yè)
文件大小: 604K
代理商: PCA5007H
1998 Oct 07
44
Philips Semiconductors
Product specification
Pager baseband controller
PCA5007
Table 40
Baud rate for bits BD2, BD1 and BD0
6.17.3
D
EMODULATOR
A
VERAGING
R
EGISTER
(DMD1)
The demodulator averaging register DMD1 contains the control bit for enabling the averaging function, used for the offset
compensation during demodulation and the coded average (offset) value.
Table 41
Demodulator Averaging Register (DMD1, SFR address EDH)
Table 42
Description of the DMD1 bits
BITS
BAUD RATE
BD2
BD1
BD0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
1200 symbols/s
2400 symbols/s
1600 symbols/s
3200 symbols/s
undefined
undefined
undefined
undefined
7
6
5
4
3
2
1
0
ENA
AVG6
AVG5
AVG4
AVG3
AVG2
AVG1
AVG0
BIT
SYMBOL
FUNCTION
DMD1.7
DMD1.6
DMD1.5
DMD1.4
DMD1.3
DMD1.2
DMD1.1
DMD1.0
ENA
AVG6
AVG5
AVG4
AVG3
AVG2
AVG1
AVG0
enable averaging function/offset calculation
7-bit value indicating the offset value of the demodulator. This is an indication of the LO
offset frequency and will be used to determine the AFC output voltage. For coding
see Table 37.
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