參數(shù)資料
型號(hào)： PCA5007H
廠商： NXP Semiconductors N.V.
英文描述： Pager baseband controller
中文描述： 傳呼機(jī)基帶控制器
文件頁(yè)數(shù)： 42/112頁(yè)
文件大小： 604K
代理商： PCA5007H
1998 Oct 07
42
Philips Semiconductors
Product specification
Pager baseband controller
PCA5007
Table 35
Description of the WDCON bits
BIT
SYMBOL
FUNCTION
WDCON.7
WDCON.6
WDCON.5
WDCON.4
WDCON.3
WDCON.2
WDCON.1
WDCON.0
COND
WD3
WD2
WD1
WD0
LD
Load condition
. Control signal from processor.
WD0 to WD3 is the preset value for the high nibble of the watchdog timer. The value is
the number of seconds to expiry of the watchdog.
unused
unused
Load watchdog timer with WD0 to WD3
. Control signal from processor.
6.16.3
S
AMPLE SEQUENCE TO RELOAD THE WATCHDOG
The sequence to reload the watchdog with 1 s is:
MOV WDCON, #80H; prepare condition.
MOV WDCON, #01H; reload the timer.
6.17
2 or 4-FSK demodulator, filter and clock
recovery circuit
6.17.1
F
UNCTION
The aim of the demodulator and clock recovery circuitry is
to take the signal from the receiver, to format it into
symbols and to transfer it to the processor. The two blocks
use the 76.8 kHz clock.
The demodulator decodes the incoming signal and
generates a sequence of NRZ data. This data is fed to the
clock recovery block which regenerates the
synchronization clock. This clock is used to sample and to
shift the symbols into register DMD3.
6.17.1.1
Demodulator and filter
The demodulator can operate both with 2-FSK and 4-FSK
(selected by the LEV bit). For both types of input signals
the so called demodulator, filter and direct modes are
allowed. The operational mode is selected on the basis of
the M bit and BF bit.
In the demodulator mode (M = 0 and BF = X) the I and Q
signals are decoded according to Table 36.
Operating in this mode, an offset compensation can be
performed and the calculated offset value is stored into
register DMD1, in the field AVG. The offset value can be
used by the processor to adjust the analog AFC output
voltage.
The offset coding is given in Table 37.
Both the filter and direct modes are intended for
applications with an external demodulator. In this case, at
the I and Q pins, there are fed NRZ data. In the 4-FSK
situation the MSB is at pin I and the LSB is at pin Q. In the
2-FSK situation, only pin I is used; pin Q must be
connected to V
SS
. In these two modes, the offset
calculation and compensation cannot be performed.
In the filter mode (M = 1 and BF = 0), the data is filtered
and then sent to the clock recovery. In the direct mode
(M = 1 and BF = 1), no function of the demodulator is
performed. Consequently there is no filtering on the data
which is sent directly to the clock recovery.
Table 36
Modulation coding
FREQUENCY
(Hz)
2-FSK
4-FSK
D1
D0
D1
D0
+4800
+1600
1600
4800
1
1
0
0
X
X
X
X
1
1
0
0
0
1
1
0
相關(guān)PDF資料
PDF描述
PCA5010 Pager baseband controller
PCA5010H Pager baseband controller
PCA82C200 STAND-ALONE CAN-CONTROLLER
PCA82C200P STAND-ALONE CAN-CONTROLLER
PCA82C200T STAND-ALONE CAN-CONTROLLER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PCA5007H/XXX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
PCA5010 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Pager baseband controller
PCA5010H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Pager baseband controller
PCA5010H/XXX 制造商:未知廠家 制造商全稱:未知廠家 功能描述:MICROCONTROLLER|8-BIT|8051 CPU|CMOS|QFP|48PIN|PLASTIC
PCA503HL320 制造商:ADAM-TECH 制造商全稱:Adam Technologies, Inc. 功能描述:ZIF FLEX CIRCUIT CONNECTOR
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*