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參數(shù)資料
| 型號： | PC28F640J3F75A |
| 元件分類： | PROM |
| 英文描述： | 4M X 16 FLASH 2.7V PROM, PBGA64 |
| 封裝： | LEAD FREE, BGA-64 |
| 文件頁數(shù)： | 28/66頁 |
| 文件大?。?/td> | 740K |
| 代理商： | PC28F640J3F75A |
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Numonyx Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)
Datasheet
March 2010
34
208032-02
9.0
Flash Operations
This section describes the operational features of flash memory. Operations are
command-based, wherein command codes are first issued to the device, then the
device performs the desired operation. All command codes are issued to the device
using bus-write cycles (see Chapter 8.0, “Bus Interface”). A complete list of available
command codes can be found in Section 11.0, “Device Command Codes” on page 48.
9.1
Status Register
The Status Register (SR) is an 8-bit, read-only register that indicates device status and
operation errors. To read the Status Register, issue the Read Status Register command.
Subsequent reads output Status Register information on DQ[7:0], and 00h on
DQ[15:8].
SR status bits are set and cleared by the device. SR error bits are set by the device, but
must be cleared using the Clear Status Register command. Upon power-up or exit from
reset, the Status Register defaults to 80h. Page-mode reads are not supported in this
read mode. Status Register contents are latched on the falling edge of OE# or CEX (CEX
low is defined as the combination of pins CE0, CE1, and CE2 that enable the device.
CEX high is defined as the combination of pins CE0, CE1, and CE2 that disable the
device). OE# must toggle to VIH or the device must be disabled before further reads to
update the Status Register latch. The Read Status Register command functions
independently of VPEN voltage.
Table 20 shows Status Register bit definitions.
Table 20: Status Register Bit Definitions
Status Register (SR)
Default Value = 80h
Ready
Status
Erase
Suspend
Status
Erase
Error
Program
Error
Program/
Erase
Voltage
Error
Program
Suspend
Status
Block-Locked
Error
Reserved
76
5
4
3
2
1
0
Bit
Name
Description
7Ready Status
0 = Device is busy. SR[6:0] are invalid (Not driven);
1 = Device is ready. SR[6:0] are valid.
6Erase Suspend Status
0 = Erase suspend not in effect.
1 = Erase suspend in effect.
5
Erase Error
Command
Sequence
Error
SR.5 SR.4
0
0 = Program or erase operation successful.
0
1 = Program error - operation aborted.
1
0 = Erase error - operation aborted.
1
1 = Command sequence error - command aborted.
4
Program
Error
3
Program/Erase Voltage Error
0 = Within acceptable limits during program or erase operation.
1 = Not within acceptable limits during program or erase operation - Operation
aborted.
2
Program Suspend Status
0 = Program suspend not in effect.
1 = Program suspend in effect.
1Block-Locked Error
0 = Block NOT locked during program or erase - operation successful.
1 = Block locked during program or erase - operation aborted.
0
Reserved
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| PC28F640J3F75B | 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Tape and Reel |
| PC28F640J3F75B TR | 制造商:Micron Technology Inc 功能描述:IC FLASH 64MBIT 75NS TBGA |
| PC28F640J3F75D | 制造商:Micron Technology Inc 功能描述:NUMONYX EMBEDDED FLASH MEMORY (J3 65NM) SINGLE BIT PER CELL (SBC) 制造商:Micron Technology Inc 功能描述:NOR Flash Parallel 3V/3.3V 64Mbit 8M/4M x 8bit/16bit 75ns 64-Pin EBGA T/R 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Tape and Reel 制造商:Micron Technology 功能描述:NOR Flash Parallel 3V/3.3V 64Mbit 8M/4M x 8bit/16bit 75ns 64-Pin EBGA T/R 制造商:Micron Technology 功能描述:NUMONYX EMBEDDED FLASH MEMORY (J3 65NM) SINGLE BIT PER CELL (SBC) |
| PC28F640J3F75E | 制造商:Micron Technology Inc 功能描述:PARALLEL NOR - Trays |
| PC28F640P30B85 | 制造商:Intel 功能描述:MM#873919 64MB FLASH SOLD->NUM |
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