參數(shù)資料
型號: PC28F640J3F75A
元件分類: PROM
英文描述: 4M X 16 FLASH 2.7V PROM, PBGA64
封裝: LEAD FREE, BGA-64
文件頁數(shù): 15/66頁
文件大?。?/td> 740K
代理商: PC28F640J3F75A
Numonyx Embedded Flash Memory (J3 65 nm) Single Bit per Cell (SBC)
Datasheet
March 2010
22
208032-02
6.2
DC Voltage specifications
6.3
Capacitance
Notes:
1.
Sampled, not 100% tested.
2.
TA = -40 °C to +85 °C, VCC= VCCQ= 0 to 3.6 V.
Table 8:
DC Voltage Characteristics
VCCQ
2.7 - 3.6 V
Test Conditions
Notes
VCC
2.7 - 3.6 V
Symbol
Parameter
Min
Max
Unit
VIL
Input Low Voltage
–0.5
0.8
V
2, 5, 6
VIH
Input High Voltage
2.0
VCCQ + 0.5
V
2, 5, 6
VOL
Output Low Voltage
—0.4
V
VCC = VCCMin
VCCQ = VCCQ Min
IOL = 2 mA
1, 2
—0.2
V
VCC = VCCMin
VCCQ = VCCQ Min
IOL = 100 A
VOH
Output High Voltage
0.85 × VCCQ
—V
VCC = VCCMIN
VCCQ = VCCQ Min
IOH = –2.5 mA
1, 2
VCCQ 0.2
V
VCC = VCCMIN
VCCQ = VCCQ Min
IOH = –100 A
VPENLK
VPEN Lockout during Program,
Erase and Lock-Bit Operations
—2.2
V
2, 3
VPENH
VPEN during Block Erase, Program,
or Lock-Bit Operations
2.7
3.6
V
3
VLKO
VCC Lockout Voltage
2.0
V
4
Notes:
1.
Includes STS.
2.
Sampled, not 100% tested.
3.
Block erases, programming, and lock-bit configurations are inhibited when VPEN ≤ VPENLK, and not guaranteed in the
range between VPENLK (max) and VPENH (min), and above VPENH (max).
4.
Block erases, programming, and lock-bit configurations are inhibited when VCC < VLKO, and not guaranteed in the range
between VLKO (min) and VCC (min), and above VCC (max).
5.
Includes all operational modes of the device.
6.
Input/Output signals can undershoot to -1.0V referenced to VSS and can overshoot to VCCQ + 1.0V for duration of 2ns or
less, the VCCQ valid range is referenced to VSS.
Table 9:
Capacitance
Symbol
Parameter1
Type
Max
Unit
Condition2
CIN
Input Capacitance
67
pF
VIN = 0.0 V
COUT
Output Capacitance
45
pF
VOUT = 0.0 V
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