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參數(shù)資料
| 型號： | OX16PCI952-TQFP-A |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Integrated High Performance Dual UARTs, Parallel Port and 5.0v PCI interface |
| 中文描述： | 集成高性能的雙UART，并行端口和5.0V PCI接口 |
| 文件頁數(shù)： | 57/76頁 |
| 文件大小： | 1386K |
| 代理商： | OX16PCI952-TQFP-A |
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9 S
ERIAL
EEPROMS
PECIFICATION
DataSheet Revision 1.1
Page 57
OX16PCI952
OXFORD SEMICONDUCTOR LTD.
The OX16PCI952 can be configured using an optional
serial electrically-erasable programmable read only
memory (EEPROM). If the EEPROMis not present, the
device will remain in its default configuration after reset.
Although this may be adequate for some applications,
many will benefit fromthe degree of programmability
afforded by this feature. The EEPROM also allows
accesses to the integrated UARTs and the parallel port,
which can be useful for default setups.
The EEPROM interface supports a variety of serial
EEPROM devices that have a proprietary serial interface
known as Microwire
TM
. This interface has four pins which
supply the memory device with a clock, a chip-select, and
serial data input and output lines. In order to read from
such a device, a controller has to output serially a read
command and address, then input serially the data. The
interface controller has been designed to handle
(autodetect) the following list of compatible devices that
have a 16-bit data word format but differ in memory size
(and hence the number of address bits). NM93C46 (64
WORDS), NM93C56 (128 WORDS), devices with 256
WORDS, 512 WORDs and 1024 WORDS.
The OX16PCI952 incorporates a controller module which
reads data fromthe serial EEPROMand writes data into
the relevant register space. It performs this operation in a
sequence which starts immediately after a PCI bus reset
and ends either when the controller finds no EEPROMis
present or when it reaches the end of the eepromdata.
Note that any attempted PCI access while the eepromis
being sensed or while data is being downloaded fromthe
serial EEPROM will result in a “retry” response
. The
operation of this controller is described below.
Following device configuration, driver software can access
the serial EEPROMthrough four bits in the device-specific
Local Configuration Register LCC[27:24]. Software can use
this register to manipulate the device pins in order to read
and modify the EEPROMcontents as desired. Any
changes to the eepromcontents, however, will not take
effect until a PCI bus reset takes place or until the eeprom
reload option (LCC[29]) is set.
A Windows
based utility to programthe EEPROM is
available. For further details please contact Oxford
Semconductor (see back cover).
Mcrowire
TM
is a trade mark of National Semconductor. For a description
of Mcrowire
TM
, please refer to National Semconductor data manuals.
9.1
EEPROMData Organisation
The serial EEPROM data is divided into five zones. The
size of each zone is an exact multiple of 16-bit WORDs.
Zone0 is allocated to the header. An EEPROM program
must contain a valid header before any further data is
interrogated.
The general EEPROM data structure is shown in Table 26.
DATA
Zone
(Words)
0
One
Header
1
Multiples of 2
Function Access
2
One to more
Local Configuration Registers
3
One to four
Identification Registers
4
Two or more
PCI Configuration Registers
Size
Description
Table 26: EEPROM data format
9.1.1
The header identifies the EEPROM programas valid.
Bits
Description
15:4
These bits should return 0x950 to identify a valid
program Once the OX16PCI952 reads 0x950
fromthese bits, it sets LCC[28] to indicate that a
valid EEPROM programis present.
3
1 = Zone1 (Function Access) exists
0 = Zone1 does not exist
2
1 = Zone2 (Local Configuration Registers) exists
0 = Zone2 does not exist
1
1 = Zone3 (Identification Registers) exists
0 = Zone3 does not exist
0
1 = Zone4 (PCI Configuration Registers) exists
0 = Zone4 does not exist
The programmng data for each zone follows the
proceeding zone if it exists. For example a Header value of
0x950F indicates that all zones exist and they follow one
another in sequence (fromZone1 to Zone4), while 0x950A
indicates that only Zones 1 and 3 exist where the header
data is followed b Zone1 WORDs, and since Zone2 is
mssing Zone1 WORDs are followed by Zone3 WORDs.
Zone0: Header
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