參數(shù)資料
型號(hào): ORLI10G3BM680-DB
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: FPGA
英文描述: FPGA, 1296 CLBS, 333000 GATES, PBGA680
封裝: PLASTIC, FBGA-680
文件頁(yè)數(shù): 47/78頁(yè)
文件大?。?/td> 1689K
代理商: ORLI10G3BM680-DB
Lattice Semiconductor
ORCA ORLI10G Data Sheet
51
Pin Information (continued)
Table 15. Pin Descriptions (continued)
Symbol
I/O
Description
Special-Purpose Pins (continued)
DIN
I
During slave serial or master serial conguration modes, DIN accepts serial conguration data syn-
chronous with CCLK. During parallel conguration modes, DIN is the D0 input. During conguration, a
pull-up is enabled.
I/O After conguration, this pin is a user-programmable I/O pin.*
DOUT
O
During conguration, DOUT is the serial data output that can drive the DIN of daisy-chained slave
devices. Data out on DOUT changes on the rising edge of CCLK.
I/O After conguration, DOUT is a user-programmable I/O pin.*
TESTCFG
I
During conguration this pin should be held high, to allow conguration to occur. A pull-up is enabled
during conguration.
I/O After conguration, TESTCFG is a user-programmable I/O pin.*
* The timing of DONE release is controlled by one set of bit stream options, and the timing of the simultaneous release of all other conguration
pins (and the activation of all user I/Os) is controlled by a second set of options.
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