參數(shù)資料
型號： OR4E10
廠商： Lineage Power
英文描述： Field-Programmable Gate Arrays(現(xiàn)場可編程門陣列)
中文描述： 現(xiàn)場可編程門陣列（現(xiàn)場可編程門陣列）
文件頁數(shù)： 18/132頁
文件大小： 2667K
代理商： OR4E10
18
Lucent Technologies Inc.
Preliminary Data Sheet
August 2000
ORCA Series 4 FPGAs
Programmable Logic Cells
(continued)
In the third submode,
multiplier submode
, a single
PFU can affect an 8x1 bit (4x1 for half-ripple mode)
multiply and sum with a partial product (see Figure 11).
The multiplier bit is input at F5[A:C], respectively per
nibble, and the multiplicand bits are input at K
Z
[1],
where K
7
[1] is the most significant bit (MSB). K
Z
[0] con-
tains the partial product (or other input to be summed)
from a previous stage. If F5[A:C] is logical 1, the multi-
plicand is added to the partial product. If F5[A:C] is log-
ical 0, 0 is added to the partial product, which is the
same as passing the partial product. CIN/FCIN can
bring the carry-in from the less significant PFUs if the
multiplicand is wider than 8 bits, and COUT/FCOUT
holds any carry-out from the multiplication, which may
then be used as part of the product or routed to another
PFU in multiplier mode for multiplicand width expan-
sion.
Ripple mode’s fourth submode features
equality
comparators
. The functions that are explicitly available
are A
≥
B, A
≠
B, and A
≤
B, where the value for A is
input on K
Z
[0], and the value for B is input on K
Z
[1]. A
value of 1 on the carry-out signals valid argument. For
example, a carry-out equal to 1 in AB submode indi-
cates that the value on K
Z
[0] is greater than or equal to
the value on K
Z
[1]. Conversely, the functions A
≤
B,
A + B, and A > B are available using the same functions
but with a 0 output expected. For example, A
>
B with a
0 output indicates A
≤
B. Table 5 shows each function
and the output expected.
If larger than 8 bits, the carry-out
signal can be cas-
caded using fast-carry logic to the carry-in of any adja-
cent PFU. The use of this submode could be shown
using Figure 9, except that the CIN/FCIN input for the
least significant PFU is controlled via configuration.
Table 5. Ripple Mode Equality Comparator
Functions and Outputs
5-5757(F)
Key: C = configuration data.
Note: F5[A:C] shorted together.
Figure 11. Multiplier Submode
Equality
Function
A
≥
B
A
≤
B
A
≠
B
A < B
A > B
A = B
ORCA Foundry
Submode
A
≥
B
A
≤
B
A
≠
B
A > B
A < B
A
≠
B
True, if
Carry-Out Is:
1
1
1
0
0
0
K7[1]
K7[0]
+
D
Q
C
C
D
Q
1
0
0
K7
F5[A:C]
K4[1]
K4[0]
+
D
Q
1
0
0
K4
K3[1]
K3[0]
+
D
Q
1
0
0
K3
K2[1]
K2[0]
+
D
Q
1
0
0
K2
K1[1]
K1[0]
+
D
Q
1
0
0
K1
K6[1]
K6[0]
+
D
Q
1
0
0
K6
K5[1]
K5[0]
+
D
Q
1
0
0
K5
K0[1]
K0[0]
+
D
Q
1
0
0
K0
Q0
F0
Q1
F1
Q2
F2
Q3
F3
Q4
F4
Q5
F5
Q6
F6
Q7
F7
COUT
REGCOUT
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