參數(shù)資料
型號: MT4LDT464AG
廠商: Micron Technology, Inc.
英文描述: 4 Meg x 64 Nonbuffered DRAM DIMMs(4 M x 64無緩沖動(dòng)態(tài)RAM雙列直插存儲器模塊)
中文描述: 4梅格× 64 Nonbuffered內(nèi)存插槽(4個(gè)M × 64無緩沖動(dòng)態(tài)RAM的雙列直插存儲器模塊)
文件頁數(shù): 10/31頁
文件大?。?/td> 439K
代理商: MT4LDT464AG
1, 2, 4 Meg x 64 Nonbuffered DRAM DIMMs
DM67.p65 – Rev. 6/98
Micron Technology, Inc., reserves the right to change products or specifications without notice.
1998, Micron Technology, Inc.
10
1, 2, 4 MEG x 64
NONBUFFERED DRAM DIMMs
OBSOLETE
FAST PAGE MODE
AC ELECTRICAL CHARACTERISTICS
(Notes: 5, 6, 7, 8, 9, 12, 29) (V
DD
= +3.3V
±
0.3V)
AC CHARACTERISTICS - FAST PAGE MODE OPTION
PARAMETER
Access time from column address
Column-address hold time (referenced to RAS#)
Column-address setup time
Row-address setup time
Column address to WE# delay time
Access time from CAS#
Column-address hold time
CAS# pulse width
CAS# hold time (CBR Refresh)
CAS# to output in Low-Z
CAS# precharge time
Access time from CAS# precharge
CAS# to RAS# precharge time
CAS# hold time
CAS# setup time (CBR Refresh)
CAS# to WE# delay time
WRITE command to CAS# lead time
Data-in hold time
Data-in setup time
Output disable
Output enable
OE# hold time from WE# during READ-MODIFY-WRITE cycle
Output buffer turn-off delay
OE# setup prior to RAS# during HIDDEN REFRESH cycle
FAST-PAGE-MODE READ or WRITE cycle time
FAST-PAGE-MODE READ-WRITE cycle time
Access time from RAS#
RAS# to column-address delay time
Row-address hold time
RAS# pulse width
RAS# pulse width (FAST PAGE MODE)
-6
SYMBOL
t
AA
t
AR
t
ASC
t
ASR
t
AWD
t
CAC
t
CAH
t
CAS
t
CHR
t
CLZ
t
CP
t
CPA
t
CRP
t
CSH
t
CSR
t
CWD
t
CWL
t
DH
t
DS
t
OD
t
OE
t
OEH
t
OFF
t
ORD
t
PC
t
PRWC
t
RAC
t
RAD
t
RAH
t
RAS
t
RASP
MIN
MAX
30
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES
45
0
0
55
23
14
15
10
15
10
3
10
10,000
4
25
15
35
5
60
5
40
15
10
0
3
4
23
22
22
15
15
15
3
0
35
85
15
19, 25, 26
60
13
17
15
10
60
60
10,000
125,000
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