
Table 11: AC Operating Specifications and Conditions (Continued)
Not all speed grades listed may be supported for this device; refer to the title page for speeds supported; Notes: 1–5 apply to the entire table;
VDDQ = +1.8V ±0.1V, VDD = +1.8V ±0.1V
AC Characteristics
-187E
-25E
-25
-3E
-3
-37E
-5E
Units Notes
Parameter
Symbol
Min
Max
Min Max Min Max Min Max Min Max Min Max Min Max
Clock
Jitter
Period jitter
tJITper
–90
90
–100
100
–100
100
–125
125
–125
125
–125
125
–125
125
ps
Half period
tJITdty
–75
75
–100
100
–100
100
–125
125
–125
125
–125
125
–150
150
ps
Cycle to cycle
tJITcc
180
200
250
ps
Cumulative error,
2 cycles
tERR2per –132
132
–150
150
–150
150
–175
175
–175
175
–175
175
–175
175
ps
Cumulative error,
3 cycles
tERR3per –157
157
–175
175
–175
175
–225
225
–225
225
–225
225
–225
225
ps
Cumulative error,
4 cycles
tERR4per –175
175
–200
200
–200
200
–250
250
–250
250
–250
250
–250
250
ps
Cumulative error,
5 cycles
tERR5per –188
188
–200
200
–200
200
–250
250
–250
250
–250
250
–250
250
ps
Cumulative error,
6–10 cycles
tERR6–
10per
–250
250
–300
300
–300
300
–350
350
–350
350
–350
350
–350
350
ps
Cumulative error,
11–50 cycles
tERR11–
50per
–425
425
–450
450
–450
450
–450
450
–450
450
–450
450
–450
450
ps
Data
Strobe-Out
DQS output access
time from CK/CK#
tDQSCK
–300
+300
–350 +350 –350 +350 –400 +400 –400 +400 –450 +450 –500 +500
ps
DQS read preamble
tRPRE
MIN = 0.9 × tCK
MAX = 1.1 × tCK
tCK
DQS read
postamble
tRPST
MIN = 0.4 × tCK
MAX = 0.6 × tCK
tCK
CK/CK# to DQS
Low-Z
tLZ1
MIN = tAC (MIN)
MAX = tAC (MAX)
ps
1Gb:
x4,
x8,
x16
DDR2
SDRAM
AC
Timing
Operating
Specifications
PDF:
09005aef821ae8bf
1GbDDR2.pdf
–
Rev.
S
10/09
EN
32
Micron
Technology,
Inc.
reserves
the
right
to
change
products
or
specifications
without
notice.
2004
Micron
Technology,
Inc.
All
rights
reserved.