參數(shù)資料
型號(hào): MPC509
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: Highly Integrated, Low-Power, 32-Bit Microcontroller
中文描述: 32-BIT, RISC MICROCONTROLLER, PQFP16
文件頁(yè)數(shù): 252/300頁(yè)
文件大?。?/td> 3744K
代理商: MPC509
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)第125頁(yè)第126頁(yè)第127頁(yè)第128頁(yè)第129頁(yè)第130頁(yè)第131頁(yè)第132頁(yè)第133頁(yè)第134頁(yè)第135頁(yè)第136頁(yè)第137頁(yè)第138頁(yè)第139頁(yè)第140頁(yè)第141頁(yè)第142頁(yè)第143頁(yè)第144頁(yè)第145頁(yè)第146頁(yè)第147頁(yè)第148頁(yè)第149頁(yè)第150頁(yè)第151頁(yè)第152頁(yè)第153頁(yè)第154頁(yè)第155頁(yè)第156頁(yè)第157頁(yè)第158頁(yè)第159頁(yè)第160頁(yè)第161頁(yè)第162頁(yè)第163頁(yè)第164頁(yè)第165頁(yè)第166頁(yè)第167頁(yè)第168頁(yè)第169頁(yè)第170頁(yè)第171頁(yè)第172頁(yè)第173頁(yè)第174頁(yè)第175頁(yè)第176頁(yè)第177頁(yè)第178頁(yè)第179頁(yè)第180頁(yè)第181頁(yè)第182頁(yè)第183頁(yè)第184頁(yè)第185頁(yè)第186頁(yè)第187頁(yè)第188頁(yè)第189頁(yè)第190頁(yè)第191頁(yè)第192頁(yè)第193頁(yè)第194頁(yè)第195頁(yè)第196頁(yè)第197頁(yè)第198頁(yè)第199頁(yè)第200頁(yè)第201頁(yè)第202頁(yè)第203頁(yè)第204頁(yè)第205頁(yè)第206頁(yè)第207頁(yè)第208頁(yè)第209頁(yè)第210頁(yè)第211頁(yè)第212頁(yè)第213頁(yè)第214頁(yè)第215頁(yè)第216頁(yè)第217頁(yè)第218頁(yè)第219頁(yè)第220頁(yè)第221頁(yè)第222頁(yè)第223頁(yè)第224頁(yè)第225頁(yè)第226頁(yè)第227頁(yè)第228頁(yè)第229頁(yè)第230頁(yè)第231頁(yè)第232頁(yè)第233頁(yè)第234頁(yè)第235頁(yè)第236頁(yè)第237頁(yè)第238頁(yè)第239頁(yè)第240頁(yè)第241頁(yè)第242頁(yè)第243頁(yè)第244頁(yè)第245頁(yè)第246頁(yè)第247頁(yè)第248頁(yè)第249頁(yè)第250頁(yè)第251頁(yè)當(dāng)前第252頁(yè)第253頁(yè)第254頁(yè)第255頁(yè)第256頁(yè)第257頁(yè)第258頁(yè)第259頁(yè)第260頁(yè)第261頁(yè)第262頁(yè)第263頁(yè)第264頁(yè)第265頁(yè)第266頁(yè)第267頁(yè)第268頁(yè)第269頁(yè)第270頁(yè)第271頁(yè)第272頁(yè)第273頁(yè)第274頁(yè)第275頁(yè)第276頁(yè)第277頁(yè)第278頁(yè)第279頁(yè)第280頁(yè)第281頁(yè)第282頁(yè)第283頁(yè)第284頁(yè)第285頁(yè)第286頁(yè)第287頁(yè)第288頁(yè)第289頁(yè)第290頁(yè)第291頁(yè)第292頁(yè)第293頁(yè)第294頁(yè)第295頁(yè)第296頁(yè)第297頁(yè)第298頁(yè)第299頁(yè)第300頁(yè)
MOTOROLA
8-34
DEVELOPMENT SUPPORT
Rev. 15 June 98
MPC509
USER’S MANUAL
tion status is shifting out. The port terminates the current CPU access with a bus error.
The next transmission to the port should be a new instruction or trap enable data.
8.3.8.4 Null Output
Finally, the nullencoding is used to indicate that no data has been transferred from the
CPU to the development port shift register. It also indicates that the previous transmis-
sion did not have any associated errors.
8.3.9 Use of the Ready Bit
To minimize the overhead required to detect and correct errors, the external develop-
ment system should wait for the ready bit on DSDO before beginning each input
transmission. This ensures that all CPU activity (if any) relative to the previous trans-
mission has been completed and that any errors have been reported.
When the ready bit is used to pace the transmissions, the error status is reported dur-
ing the transmission following the error. Since any transmission into the port which
occurs while shifting out an error status is ignored by the port, the error handler in the
external development tool does not need to undo the effects of an intervening
instruction.
To improve system performance, however, an external development system may
begin transmissions before the ready bit is asserted. If the next transmission does not
wait until the port indicates ready, the port will not assert ready again until this next
transmission completes and all activity associated with it has finished. Transmissions
that begin before ready is asserted on DSDI are subject to the following limitations and
problems.
First, if the previous transmission results in a sequence error, or the CPU reports an
exception, that status may not be reported until two transmissions after the transmis-
sion that caused the error. (When the ready bit is used, the status is reported in the
following transmission.) This is because an error condition which occurs after the start
of a transmission cannot be reported until the next transmission.
Second, if a transmitted instruction causes the CPU to write to the DPDR and the
transmission that follows does not wait for the assertion of ready, the CPU data may
not be latched into the development port shift register, and the valid data status is not
output. Despite this, no error is indicated in the status outputs. To ensure that the CPU
has had enough time to write to the DPDR, there must be at least four CLKOUT cycles
between the time the last bit of the instruction (move to SPR) is clocked into the port
and the time the start bit for the next transmission is clocked into the port.
8.4 Debug Mode Functions
In debug mode, the CPU fetches all instructions from the development port. In addi-
tion, data can be read from and written to the development port. This allows memory
and registers to be read and modified by an external development tool (emulator) con-
nected to the development port.
相關(guān)PDF資料
PDF描述
MPC5200BV400 MPC5200 Hardware Specifications
MPC5200CBV266 MPC5200 Hardware Specifications
MPC5200CBV400 MPC5200 Hardware Specifications
MPC5200ID MPC5200 Hardware Specifications
MPC555 Highly Integrated, Low-Power, 32-Bit Microcontroller
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MPC509A 制造商:BB 制造商全稱:BB 功能描述:Single-Ended 8-Channel/Differential 4-Channel CMOS ANALOG MULTIPLEXERS
MPC509AP 功能描述:多路器開關(guān) IC 4-Ch Diff-Input Analog Mult RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻(最大值):7 Ohms 開啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16
MPC509AP 制造商:BURR-BROWN 功能描述:IC MUX 4CH DP DIP28 509 制造商:Texas Instruments 功能描述:Multiplexer IC Multiplexer Type:Differen
MPC509APG4 功能描述:多路器開關(guān) IC 4Ch Diff-Input Ana Multiplexer RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻(最大值):7 Ohms 開啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16
MPC509AU 功能描述:多路器開關(guān) IC 4-Ch Diff-Input Analog Mult RoHS:否 制造商:Texas Instruments 通道數(shù)量:1 開關(guān)數(shù)量:4 開啟電阻(最大值):7 Ohms 開啟時(shí)間(最大值): 關(guān)閉時(shí)間(最大值): 傳播延遲時(shí)間:0.25 ns 工作電源電壓:2.3 V to 3.6 V 工作電源電流: 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UQFN-16