
6
6-
2
5
P
R
E
L
IM
IN
A
R
Y
C
P
U
In
str
u
cti
o
n
S
e
t
S
u
m
a
r
y
REPE SCAS Scan String
(Find non-AL/AX/EAX)
F3 A[111w]
x
-
x
x x
10+2n
b
h
REPNE CMPS Compare String
(Find match)
F2 A[011w]
x
-
x
x x
10+2n
b
h
REPNE SCAS Scan String
(Find AL/AX/EAX)
F2 A[111w]
x
-
x
x x
10+2n
b
h
RET Return from Subroutine
Within Segment
Within Segment Adding Immediate to SP
Intersegment
Intersegment Adding Immediate to SP
Protected Mode: Different Privilege Level
Intersegment
Intersegment Adding Immediate to SP
C3
C2 ##
CB
CA ##
-
- -
3
4
3
4
7
23
b
g,h,j,k,r
ROL Rotate Left
Register/Memory by 1
Register/Memory by CL
Register/Memory by Immediate
D[000w] [mod 000 r/m]
D[001w] [mod 000 r/m]
C[000w] [mod 000 r/m] #
x
-
- x
u
-
x
u
-
x
1
2
1
2
1
bh
ROR Rotate Right
Register/Memory by 1
Register/Memory by CL
Register/Memory by Immediate
D[000w] [mod 001 r/m]
D[001w] [mod 001 r/m]
C[000w] [mod 001 r/m] #
x
-
- x
u
-
x
u
-
x
1
2
1
2
1
bh
RSDC Restore Segment Register and Descriptor
0F 79 [mod sreg3 r/m]
-
- -
6
s
RSLDT Restore LDTR and Descriptor
0F 7B [mod 000 r/m]
-
- -
6
s
RSM Resume from SMM Mode
0F AA
x
x x
x
x x
40
s
RSTS Restore TSR and Descriptor
0F 7D [mod 000 r/m]
-
- -
6
s
SAHF Store AH in FLAGS
9E
-
x
x x
1
SAL Shift Left Arithmetic
Register/Memory by 1
Register/Memory by CL
Register/Memory by Immediate
D[000w] [mod 100 r/m]
D[001w] [mod 100 r/m]
C[000w] [mod 100 r/m] #
x
-
x x
u
x x
u
-
x x
u
x x
u
-
x x
u
x x
1
2
1
2
1
bh
SAR Shift Right Arithmetic
Register/Memory by 1
Register/Memory by CL
Register/Memory by Immediate
D[000w] [mod 111 r/m]
D[001w] [mod 111 r/m]
C[000w] [mod 111 r/m] #
x
-
x x
u
x x
u
-
- x x
u
x x
u
-
- x x
u
x x
1
2
1
2
1
bh
SBB Integer Subtract with Borrow
Register to Register
Register to Memory
Memory to Register
Immediate to Register/Memory
Immediate to Accumulator (short form)
1[10dw] [11 reg r/m]
1[100w] [mod reg r/m]
1[101w] [mod reg r/m]
8[00sw] [mod 011 r/m] ###
1[110w] ###
x
-
x
x x
1
bh
Table 6-21. M II CPU Instruction Set Clock Count Summary (Continued)
INSTRUCTION
OPCODE
FLAGS
REAL
MODE CLOCK
COUNT
PROTECTED
MODE CLOCK
COUNT
NOTES
OF DF IF TF SF ZF AF PF CF
Reg/
Cache Hit
Reg/
Cache Hit
Real
Mode
Protected
Mode
#
= immediate 8-bit data
+
= 8-bit signed displacement
x = modified
## = immediate 16-bit data
+++ = full signed displacement (16, 32 bits)
- = unchanged
### = full immediate 32-bit data (8, 16, 32 bits)
u = undefined