
MFC2000 Multifunctional Peripheral Controller 2000
Hardware Description
14-14
Conexant
100723A
Bit 15-0:
Not used
Writing any value to this register causes the data in FIFO to push or
pop data through the FIFO data port and the FIFO Quad Halfword 1-4
registers. The FIFO operation depends on the direction of data flow. If
the compressor/decompressor is emptying the FIFO, data is
transferred from the FIFO data port register to the FIFO Quad
Halfword 1 register, simultaneously with data transfer from Quad
Halfword 1 to Quad Halfword 2, Quad Halfword 2 to Quad Halfword 3,
and Quad Halfword 3 to Quad Halfword 4, with the original data of
Quad Halfword 4 being lost. If the compressor/decompressor is filling
the FIFO, data is transferred from the FIFO Quad Halfword 1 register
to the FIFO data port register, simultaneously with data transfer from
Quad Halfword 2 to Quad Halfword 1, Quad Halfword 3 to Quad
Halfword 2, and Quad Halfword 4 to Quad Halfword 3, with the
contents of Quad Halfword 4 becoming indeterminate.
T.4 Current Line Data FIFO Data Port for the Uncoded data to/from the external memory:
Address:
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Bit 10
Bit 9
Bit 8
Default:
T.4 Current Line
Data FIFO Data Port
(T4CurDataPort)
$01FF816D
Address:
data
bit 15
data
bit 14
data
bit 13
data
bit 12
data
bit 11
data
bit 10
data
bit 9
data
bit 8
Rst Value
xxh
Read Value
xxh
Default:
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
T.4 Current Line
Data FIFO Data Port
(T4CurDataPort)
$01FF816C
data
bit 7
data
bit 6
data
bit 5
data
bit 4
data
bit 3
data
bit 2
data
bit 1
data
bit 0
Rst Value
xxh
Read Value
xxh
Address
Bit 15
(Not Used)
Bit 14
(Not Used)
Bit 13
(Not Used)
Bit 12
(Not Used)
Bit 11
(Not Used)
Bit 10
(Not Used)
Bit 9
Bit 8
Default
Rst. Value
xxh
Read Value:
xxh
T4 Current Line Data
FIFO
Data Port Transfer
(T4CurDataPortTfr)
$01FF816F (DW)
(Not Used)
(Not Used)
Address
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Default
Rst. Value
xxh
Read Value
xxh
T4 Current Line Data
FIFO
Data Port Transfer
(T4CurDataPortTfr)
$01FF816E (DW)
(Not Used)
(Not Used)
(Not Used)
(Not Used)
(Not Used)
(Not Used)
(Not Used)
(Not Used)
Bit 15-0:
Not used
Writing any value to this register causes the data in FIFO to push or
pop data through the FIFO data port and the FIFO Quad Halfword 1-4
registers. The FIFO operation depends on the direction of data flow. If
the compressor/decompressor is emptying the FIFO, data is
transferred from the FIFO data port register to the FIFO Quad
Halfword 1 register, simultaneously with data transfer from Quad
Halfword 1 to Quad Halfword 2, Quad Halfword 2 to Quad Halfword 3,
and Quad Halfword 3 to Quad Halfword 4, with the original data of
Quad Halfword 4 being lost. If the compressor/decompressor is filling
the FIFO, data is transferred from the FIFO Quad Halfword 1 register
to the FIFO data port register, simultaneously with data transfer from
Quad Halfword 2 to Quad Halfword 1, Quad Halfword 3 to Quad
Halfword 2, and Quad Halfword 4 to Quad Halfword 3, with the
contents of Quad Halfword 4 becoming indeterminate.