
MFC2000 Multifunctional Peripheral Controller 2000
Hardware Description
14-6
Conexant
100723A
Bit 7:
End of Line Conditions.
For coding, the End-of-line Condition occurs when all data in the line
has been compressed and the last codeword has been written to the
T4Data FIFO.
For decoding, the End-of-line Condition occurs when the decoding of a
line is complete, and all decoded data has been written to the line
buffer. For MH and MR modes, decoding is complete when the EOL
codeword (and Tag bit if in MR mode) have been decoded. For MMR
mode, decoding is complete when the number of bytes specified by
the T4Bytes register have been decoded.
The Tag bit is only valid when the End-of-line Condition bit is also set.
The NonConsecutiveEOL/MMREOL is only valid when the End-of-line
Condition bit is also set.
Line errors apply to the decoding mode only. If a line error occurs
while decoding a line, the T.4 hardware will set the LineError bit.
Decoding will continue until an EOL code is found (MH and MR modes
only), but data decoded following the error will not be output to the line
buffer.. The type of line error can be determined by examing the Line
Error Type bit field.
When a line error occurs, the type of line error is placed in this bit field.
The following line errors are detected by the T.4 hardware:
Bit 6:
Bit 5:
Bit 4:
Line Error.
Bit 3-1:
Line Error Type.
LineError
Code:
Error:
Description:
000b
No error
001b
RTC (Return to
Control) Error
Fill bits occurred between consecutive EOL codewords.
010b
Terminating Code
Error
Codewords for white or black run lengths equal to zero which occur at the
end of a line are missing. When this error occurs the TC error bit (T4Status
register) is set as well as the normal error bit; this is to allow the user to
ignore these errors if desired.
011b
Reserved
100b
Line Too Short
EOL code found before the number of bytes specified in the T4Bytes
register have been decoded.
101b
Line Too Long
The number of data bytes decoded before the EOL code is received
exceeds the line length specified in the T4Bytes register.
110b
Code Word Error
An invalid code word was decoded.
111b
Reserved
Bit 0:
Indicate the decoded line is all white when this bit is set. This bit is
reset when the decoding of a line is started.
Notes:
1. An IRQ is generated whenever any of the shaded bits shown in the T4 Status register
(bits 4, 7–9) and their associated bits in the T4IntMask register are both set.
2. Bits 0–6, and 9 only apply to decompression mode.
3. Bits 0–7 are cleared at the start of a new line.