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參數(shù)資料
| 型號(hào)： | MC68HLC705KJ1 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | Computer Operation Properly Module |
| 中文描述： | 電腦操作正確模塊 |
| 文件頁數(shù)： | 75/108頁 |
| 文件大小： | 718K |
| 代理商： | MC68HLC705KJ1 |
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Interrupts
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
75
8.3.3 Timer Interrupts
The timer can generate the following interrupt requests:
Real time
Timer overflow
Setting the I bit in the condition code register disables timer interrupts.
8.3.3.1 Real-Time Interrupt
A real-time interrupt occurs if the real-time interrupt flag, RTIF, becomes set while the real-time interrupt
enable bit, RTIE, is also set. RTIF and RTIE are in the timer status and control register.
8.3.3.2 Timer Overflow Interrupt
A timer overflow interrupt request occurs if the timer overflow flag, TOF, becomes set while the timer
overflow interrupt enable bit, TOIE, is also set. TOF and TOIE are in the timer status and control register.
8.3.4 Interrupt Processing
The CPU takes the following actions to begin servicing an interrupt:
Stores the CPU registers on the stack in the order shown in
Figure 8-6
Sets the I bit in the condition code register to prevent further interrupts
Loads the program counter with the contents of the appropriate interrupt vector locations:
–
$07FC and $07FD (software interrupt vector)
–
$07FA and $07FB (external interrupt vector)
–
$07F8 and $07F9 (timer interrupt vector)
The return-from-interrupt (RTI) instruction causes the CPU to recover the CPU registers from the stack
as shown in
Figure 8-6
.
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