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參數(shù)資料
| 型號(hào)： | MC68HLC705KJ1 |
| 廠商： | 飛思卡爾半導(dǎo)體(中國(guó))有限公司 |
| 英文描述： | Computer Operation Properly Module |
| 中文描述： | 電腦操作正確模塊 |
| 文件頁(yè)數(shù)： | 31/108頁(yè) |
| 文件大小： | 718K |
| 代理商： | MC68HLC705KJ1 |
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Low-Power Modes
MC68HC705KJ1 MC68HRC705KJ1 MC68HLC705KJ1 Data Sheet, Rev. 4.1
Freescale Semiconductor
31
Upon exit from stop mode by external reset:
The counter begins counting from $0000.
The counter is cleared again after the oscillator stabilization delay and begins counting from $0000
again.
Upon exit from stop mode by external interrupt:
The counter begins counting from $0000.
The counter is not
cleared again after the oscillator stabilization delay and continues counting
throughout the oscillator stabilization delay.
NOTE
Immediately after exiting stop mode by external interrupt, service the COP
to ensure a full COP timeout period.
3.6.2 Wait Mode
The WAIT instruction has no effect on the COP watchdog.
NOTE
To prevent a COP timeout during wait mode, exit wait mode periodically to
service the COP.
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