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| 型號(hào)： | MC68HC05SB7 |
| 廠商： | FREESCALE SEMICONDUCTOR INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28 |
| 封裝： | MO-150, SSOP-28 |
| 文件頁(yè)數(shù)： | 82/170頁(yè) |
| 文件大小： | 2161K |
| 代理商： | MC68HC05SB7 |
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August 27, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05SB7
GENERAL DESCRIPTION
MOTOROLA
REV 2.1
1-7
1.6.9 ESV
This pin provides a switchable 5mA at VOH (at worst case) to an external
EEPROM. The ESVEN bit in the Miscellaneous Control Register enables/disables
the ESV pin.
ESVEN — ESV Enable
This read/write bit selects whether ESV is enable or not. Reset clears the
ESVEN bit.
1 =
ESV enabled.
0 =
ESV disabled.
1.6.10 PA0-PA7 / PWM0-PWM3, SCL0-SCL1, SDA0-SDA1
These eight I/O lines comprise the Port A. The state of any pin is software pro-
grammable and all Port A lines are congured as inputs during power-on or reset.
PA0-PA3 are multiplexed with PWM outputs PWM0-PWM3. PA4-PA7 are multi-
plexed with the two SM-Bus channels - SCL0, SDA0 and SCL1, SDA1.
1.6.11 PB1-PB7 / TCAP, CS0-CS1, AN0-AN3
Pins PB2/CS0 and PB3/CS1 are only available when selected by a mask option.
These seven I/O lines comprise the Port B. The state of any pin is software pro-
grammable and all Port B lines are congured as input during power-on or at
reset.
PB1 is congured as the TCAP input pin for the 16-bit timer after a reset, and is
disabled by setting the ICEN bit in the Analog Control Register ($1D).
PB2 and PB3 (when selected) are multiplexed with CS0 and CS1 respectively,
from the current sense interrupt circuit. See section on Current Sense Amplier for
more details.
PB4-PB7 are multiplexed with the analog input pins of the A/D converter. See sec-
tion on Analog Subsystem for more details.
1.6.12 PC4-PC7
These four I/O lines comprise the port C. The state of any pin is software program-
mable and all port C lines are congured as input during power-on or at reset.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MCR
R
TSEN
LVRON
0
SCLK
CSSEL
TCSEL
ESVEN
SMINLEV
$000B
W
COPON
reset:
01000000
U = UNAFFECTED BY RESET
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