參數(shù)資料
型號: MC68HC05SB7
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: MO-150, SSOP-28
文件頁數(shù): 104/170頁
文件大?。?/td> 2161K
代理商: MC68HC05SB7
August 27, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05SB7
RESETS
MOTOROLA
REV 2.1
5-1
SECTION 5
RESETS
This section describes the ve reset sources and how they initialize the MCU. A
reset immediately stops the operation of the instruction being executed, initializes
certain control bits, and loads the program counter with a user dened reset vec-
tor address. The following conditions produce a reset:
Initial power up of device (power on reset).
A logic zero applied to the RESET pin (external reset).
Timeout of the COP watchdog (COP reset).
Low voltage applied to the device (LVR reset).
Fetch of an opcode from an address not in the memory map (illegal
address reset).
Figure 5-1 shows a block diagram of the reset sources and their interaction.
Figure 5-1. Reset Sources
RESET
LATCH
MCU INTERNAL REGISTER
R
COPON
COP WATCHDOG
POWER-ON RESET
ILLEGAL ADDRESS RESET
INTERNAL
D
INTERNAL
CLOCK
S
RST
TO CPU
AND
LVREN
LOW VOLTAGE RESET
VDD
3-CYCLE
CLOCKED
ONE-SHOT
SUBSYSTEMS
ADDRESS BUS
100K
VDD
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