參數(shù)資料
型號: MC68HC05SB7
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 2.1 MHz, MICROCONTROLLER, PDSO28
封裝: MO-150, SSOP-28
文件頁數(shù): 122/170頁
文件大小: 2161K
代理商: MC68HC05SB7
August 27, 1998
GENERAL RELEASE SPECIFICATION
MC68HC05SB7
SYSTEM CLOCK
MOTOROLA
REV 2.1
8-3
SCLK — Slow CLocK
1 =
Slow clock selected – VCO frequency: 500Hz to 4kHz.
0 =
Normal clock selected – VCO frequency: 1.5MHz to 5.8MHz.
NOTE
Due to process variations, operating voltages, and temperature requirements, the
quoted VCO frequencies are typical limits, and should be treated as references
only. It is the user’s responsibility to ensure that the resulting internal operating
frequency meets user’s requirement by setting the appropriate value in the VCO
Adjust Register. See below.
8.2.2 Setting the VCO Speed
The speed of the internal VCO can be adjusted by conguring ve bits in the VCO
Adjust Register (VAR) as shown in Figure 8-4. Setting VAR=11111 will select the
VCO minimum frequency, and VAR=00000 will select the maximum frequency.
On reset, VAR=10000, which selects the mid-frequency.
For Normal mode, when VAR=10000, VCO frequency is typically 2kHz.
For Slow mode, when VAR=10000, VCO frequency is typically 3.4MHz.
The VCO minimum and maximum frequencies are available preprogrammed as
two 16-bit values in the Personality EPROM (PEPROM). Bit locations $00 to $0F
holds the minimum value, and $10 to $1F holds the maximum value.
See section on Personality EPROM for further details.
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
MCR
R
TSEN
LVRON
0
SCLK
CSSEL
TCSEL
ESVEN
SMINLEV
$000B
W
COPON
reset:
01000000
U = UNAFFECTED BY RESET
Figure 8-3. Miscellaneous Control Register (MCR)
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
VAR
R
0
VA4
VA3
VA2
VA1
VA0
$000C
W
reset:
00010000
U = UNAFFECTED BY RESET
Figure 8-4. VCO Adjust Register (VAR)
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