參數(shù)資料
型號(hào): L84225
英文描述: L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02
中文描述: L84225 100BaseTX/FX/10BaseT物理層設(shè)備的技術(shù)手冊(cè),4月2日
文件頁數(shù): 95/118頁
文件大?。?/td> 890K
代理商: L84225
Specifications
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
95 of 118
April, 2002
5.8 Transmit Timing Characteristics
Refer to
Figure 16
and
Figure 17
for Timing Diagram
Sym.
Parameter
Limit
Unit
Conditions
Min
Typ
Max
t
11
TXCLK Period
39.996
399.96
16
160
16
160
40
400
20
200
20
200
40.004
400.04
24
240
24
240
10
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
100 Mbps
10 Mbps
100 Mbps
10 Mbps
100 Mbps
10 Mbps
t
12
TXCLK Low Time
t
13
TXCLK High Time
t
14
t
15
TXCLK Rise/Fall Time
TXEN Setup Time
15
4
0
2
MII
RMII
MII
MII
100 Mbps, MII and FBI
10 Mbps, MII and FBI
100 Mbps
10 Mbps
MII
RMII
MII
RMII
t
16
TXEN Hold Time
t
17
CRS During Transmit Assert
Time
40
400
160
900
t
18
CRS During Transmit Deas-
sert Time
t
19
TXD Setup Time
15
4
0
2
15
0
2
60
t
20
TXD Hold Time
ns
t
21
t
22
TXER Setup Time
TXER Hold Time
ns
ns
MII
RMII
100 Mbps, MII
100 Mbps, FBI
10 Mbps
100 Mbps
10 Mbps
10 Mbps
t
23
Transmit Propagation Delay
140
140
600
0.7
5.5
ns
ns
ns
t
24
Transmit Output Jitter
ns pk-pk
ns pk-pk
ns
t
25
Transmit SOI Pulse Width
To 0.3V
250
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