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參數(shù)資料
| 型號(hào)： | L84225 |
| 英文描述： | L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02 |
| 中文描述： | L84225 100BaseTX/FX/10BaseT物理層設(shè)備的技術(shù)手冊(cè)，4月2日 |
| 文件頁數(shù)： | 47/118頁 |
| 文件大?。?/td> | 890K |
| 代理商： | L84225 |
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Functional Description
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
47 of 118
April, 2002
The internal CRS loopback can be disabled by setting the TXEN to CRS
loopback disable bit in the MI serial port Channel Configuration register.
When this bit is set, TXEN is no longer looped back to CRS.
2.19.2 Diagnostic Loopback
A diagnostic loopback mode can also be selected by setting the loopback
bit in the MI serial port Control register. When diagnostic loopback is
enabled, TXD[3:0] data is looped back onto RXD[3:0], TXEN is looped
back onto CRS, RXDV operates normally, the TP receive and transmit
paths are disabled, the transmit link pulses are halted, and the Half/Full
Duplex modes do not change. Diagnostic loopback mode can not be
enabled when the FBI interface is selected.
2.20 Reset
The L84225 is reset when either:
1.
VDD is applied to the device,
2.
the reset bit is set in the MI serial port Control register, or
3.
the RESET pin is asserted active low.
When the reset is initiated by either (1) or (2), an internal power-on reset
pulse is generated which resets all internal circuits, forces the MI serial
port bits to their default values, and latches in new values for the MI
address. After the power-on reset pulse has finished, the reset bit in the
MI serial port Control register is cleared and the device is ready for
normal operation. The device is guaranteed to be ready for normal
operation 50 ms after the reset was initiated.
When the reset is initiated by (3), the identical procedure takes place as
in (1) and (2), except the device stays in reset until the RESET pin is
deasserted high.
2.21 Powerdown
The L84225 can be powered down by setting the powerdown bit in the
MI serial port Control register. In powerdown mode, the TP outputs are
in high impedance state, all functions are disabled except the MI serial
port, and the power consumption is reduced to a minimum. The device
will be ready for normal operation 50 ms after powerdown is deasserted.
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