參數(shù)資料
型號(hào): L84225
英文描述: L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02
中文描述: L84225 100BaseTX/FX/10BaseT物理層設(shè)備的技術(shù)手冊(cè),4月2日
文件頁數(shù): 86/118頁
文件大?。?/td> 890K
代理商: L84225
86 of 118
April, 2002
L84225 Quad 100BaseTX/FX/10BaseT Phys. Layer Device - Technical Manual
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
All GNDs should be connected as close as possible to the device with a
large ground plane. If the GNDs vary in potential by even a small
amount, noise and latchup can result. The GND pins should be kept to
within 50 mV of each other.
A 0.01-0.1uF decoupling capacitor should be connected between the
VDD group and GND on each of the 4 sides of the L84225 as close as
possible to the device pins, preferably within 0.5 in. The value should be
chosen depending on whether the noise from VDD-GND is high or low
frequency. A conservative approach would be to use two decoupling
capacitors on each side, one 0.1uf for low frequencies, and one 0.001 uf
for high frequency noise on the power supply.
The VDD connection to the transmit transformer center tap shown in
Figure 11
and
Figure 12
must be well decoupled in order to minimize
common mode noise injection from the supply into the twisted pair cable.
It is recommended that a 0.01 uF decoupling capacitor be placed
between the transformer center tap VDD connection and the L84225
GND plane. This decoupling capacitor should be physically placed as
close as possible to the transformer center tap, preferably within 0.5 in.
The PCB layout and power supply decoupling discussed above should
provide sufficient decoupling to achieve the following when measured at
the device:
1.
the resultant AC noise voltage measured across each VDD/GND set
should be less than 100 mVpp,
2.
all VDDs should be within 50 mVpp of each other, and
3.
all GNDs should be within 50 mVpp of each other.
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