參數(shù)資料
型號: L84225
英文描述: L84225 100BaseTX/FX/10BaseT Physical Layer Device technical manual 4/02
中文描述: L84225 100BaseTX/FX/10BaseT物理層設(shè)備的技術(shù)手冊,4月2日
文件頁數(shù): 50/118頁
文件大?。?/td> 890K
代理商: L84225
50 of 118
April, 2002
L84225 Quad 100BaseTX/FX/10BaseT Phys. Layer Device - Technical Manual
Copyright 1999-2002 by LSI Logic Corporation. All rights reserved.
2.25.2 Timing
Figure 9
shows a timing diagram for a MI serial port cycle.
Table 6
PHYAD[1:0] Settings
PHYAD1
PHYAD0
Channel 3
1
1
Channel 2
1
0
Channel 1
0
1
Channel 0
0
0
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