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參數(shù)資料
| 型號： | KAB01D100M-TNGP |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | CONNECTOR ACCESSORY |
| 中文描述： | 連接器附件 |
| 文件頁數(shù)： | 32/72頁 |
| 文件大?。?/td> | 1378K |
| 代理商： | KAB01D100M-TNGP |
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KAB0xD100M - TxGP
Revision 1.11
August 2003
- 32 -
MCP MEMORY
SEC Only
NAND FLASH MEMORY OPERATION
PAGE READ
Upon initial device power up, the device status is initially Read1 command(00h) latched. This operation is also initiated by writing
00h to the command register along with three address cycles. Once the command is latched, it does not need to be written for the fol-
lowing page read operation. Two types of operation are available : random read, serial page read. The random read mode is enabled
when the page address is changed. The 264 words of data within the selected page are transferred to the data registers in less than
10
μ
s(tR). The system controller can detect the completion of this data transfer(tR) by analyzing the output of R/B pin. Once the data
in a page is loaded into the registers, they may be read out by sequential RE pulse of 50n period cycle. High to low transitions of the
RE clock take out the data from the selected column address up to the last column address.
Read1 and Read2 commands determine pointer which selects either main area or spare area. The spare area(256 to 263 words)
may be selectively accessed by writing the Read2 command. Addresses A
0
to A
2
set the starting address of spare area while
addresses A
3
to A
7
must be "L". To move the pointer back to the main area, Read1 command(00h) is needed. Figures 16 through
21 show typical sequence and timing for each read operation.
Figure 14,15 details the sequence.
Figure 14. Read1 Operation
Start Add.(3Cycle)
00h
Data Output(Sequential)
CE
CLE
ALE
R/B
F
WE
DQ
x
RE
t
R
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相關代理商/技術參數(shù) |
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| KAB02D100M-TLGP | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Multi-Chip Package MEMORY |
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| KAB04D100M-TLGP | 制造商:SAMSUNG 制造商全稱:Samsung semiconductor 功能描述:Multi-Chip Package MEMORY |
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