參數(shù)資料
型號(hào): K4N26323AE-GC20
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: 128Mbit GDDR2 SDRAM
中文描述: 128Mbit GDDR2 SDRAM的
文件頁數(shù): 21/52頁
文件大?。?/td> 826K
代理商: K4N26323AE-GC20
- 21 -
Rev. 1.7 (Jan. 2003)
128M GDDR2 SDRAM
K4N26323AE-GC
Burst Read Operation Followed by Precharge: RL = 8 (AL=1, CL=7, t
RP
=8)
Burst Write followed by Precharge: AL = 1, CL = 7,
WL = AL + 1 = 2,
t
WR
= 5
CMD
NOP
NOP
NOP
NOP
NOP
NOP
DQ’s
NOP
CK, CK
0
2
1
3
4
5
6
9
WRITE A
Posted CAS
WL = 2
Precharge A
t
WR
= 5
Burst Write followed by Precharge
For write cycles, a delay must be satisfied from the completion of the last burst write cycle until the Precharge Command
can be issued. This delay is known as a write recovery time (t
WR
) referenced from the completion of the burst write to the
precharge command. No Precharge command should be issued prior to the tWR delay, as GDDR2 SDRAM does not sup-
port any burst interrupt operation.
CMD
DQ’s
CK, CK
RL = 8
DQS
> = t
RP
0
3
7
8
9
10
11
12
13
Precharge A
NOP
READ A
Posted CAS
NOP
NOP
NOP
Bank A
Activate
NOP
NOP
DOUTA
0
DOUTA
1
DOUTA
2
DOUTA
3
DINA
0
DINA
1
DINA
2
DINA
3
DQS
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