參數資料
型號: HYB18L128160BF
廠商: QIMONDA
英文描述: DRAMs for Mobile Applications 128-Mbit Mobile-RAM
中文描述: 針對移動應用的DRAM 128 - Mbit的移動RAM
文件頁數: 20/55頁
文件大?。?/td> 1399K
代理商: HYB18L128160BF
Data Sheet
20
Rev. 1.71, 2007-01
05282004-NZNK-8T0D
HY[B/E]18L128160B[C/F]-7.5
128-Mbit Mobile-RAM
Functional DescriptionCommands
During READ bursts, the valid data-out element from the starting column address is available following the CAS
latency after the READ command. Each subsequent data-out element is valid nominally at the next positive clock
edge. Upon completion of a READ burst, assuming no other READ command has been initiated, the DQs go to
High-Z state.
Figure 13
and
Figure 14
show single READ bursts for each supported CAS latency setting.
Figure 13
Single READ Burst (CAS Latency = 2)
Table 11
Parameter
Timing Parameters for READ
Symbol
- 7.5
Units
Notes
min.
max.
Access time from CLK
CL = 3
CL = 2
t
AC
t
AC
t
LZ
t
HZ
t
OH
t
DQZ
t
RC
t
RCD
t
RAS
t
RP
1.0
3.0
2.5
67
19
45
19
5.4
6.0
7.0
2
100k
ns
ns
ns
ns
ns
t
CK
ns
ns
ns
ns
DQ low-impedance time from CLK
DQ high-impedance time from CLK
Data out hold time
DQM to DQ High-Z delay (READ Commands)
ACTIVE to ACTIVE command period
ACTIVE to READ or WRITE delay
ACTIVE to PRECHARGE command period
PRECHARGE command period
1) These parameters account for the number of clock cycles and depend on the operating frequency as follows:
no. of clock cycles = specified delay / clock period; round up to next integer.
1)
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