參數(shù)資料
型號: HB52RD328DC
廠商: Hitachi,Ltd.
英文描述: 256 MB Unbuffered SDRAM S.O.DIMM(256 MB 未緩沖同步DRAM S.O.DIMM)
中文描述: 256 MB的無緩沖內(nèi)存的SODIMM(256 MB的未緩沖同步內(nèi)存的SODIMM)
文件頁數(shù): 37/68頁
文件大?。?/td> 885K
代理商: HB52RD328DC
HB52RD328DC-F
37
2. Single write:
A single write operation is enabled by setting OPCODE (A9, A8) to (1, 0). In a single write
operation, data is only written to the column address and the bank select address (BA) specified by the write
command set cycle without regard to the burst length setting. (The latency of data input is 0 clock).
WRIT
CK
Command
Din
ACTV
Row
Column
in 0
Address
t
RCD
Auto Precharge
Read with auto-precharge:
In this operation, since precharge is automatically performed after completing a
read operation, a precharge command need not be executed after each read operation. The command executed
for the same bank after the execution of this command must be the bank active (ACTV) command. In
addition, an interval defined by l
APR
is required before execution of the next command.
CE
latency
Precharge start cycle
3
2 cycle before the final data is output
2
1 cycle before the final data is output
Burst Read (Burst Length = 4)
CK
lAPR
lRAS
lAPR
CL=2 Command
CL=3 Command
Dout
Dout
Note: Internal auto-precharge starts at the timing indicated by " ".
And an interval of t
RAS
(l
RAS
) is required between previous active (ACTV) command and internal precharge " ".
ACTV
READ A
ACTV
out3
out2
out1
out0
lRAS
ACTV
READ A
ACTV
out3
out2
out1
out0
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