參數(shù)資料
型號(hào)： HB52RD328DC
廠商： Hitachi,Ltd.
英文描述： 256 MB Unbuffered SDRAM S.O.DIMM(256 MB 未緩沖同步DRAM S.O.DIMM)
中文描述： 256 MB的無(wú)緩沖內(nèi)存的SODIMM（256 MB的未緩沖同步內(nèi)存的SODIMM）
文件頁(yè)數(shù)： 26/68頁(yè)
文件大?。?/td> 885K
代理商： HB52RD328DC
HB52RD328DC-F
26
Clock suspend mode entry:
The SDRAM module enters clock suspend mode from active mode by setting
CKE to Low. If command is input in the clock suspend mode entry cycle, the command is valid. The clock
suspend mode changes depending on the current status (1 clock before) as shown below.
ACTIVE clock suspend:
This suspend mode ignores inputs after the next clock by internally maintaining
the bank active status.
READ suspend and READ with Auto-precharge suspend:
The data being output is held (and continues to
be output).
WRITE suspend and WRIT with Auto-precharge suspend:
In this mode, external signals are not
accepted. However, the internal state is held.
Clock suspend:
During clock suspend mode, keep the CKE to Low.
Clock suspend mode exit:
The SDRAM module exits from clock suspend mode by setting CKE to High
during the clock suspend state.
IDLE:
In this state, all banks are not selected, and completed precharge operation.
Auto-refresh command [REF]:
When this command is input from the IDLE state, the SDRAM module
starts auto-refresh operation. (The auto-refresh is the same as the CBR refresh of conventional DRAMs.)
During the auto-refresh operation, refresh address and bank select address are generated inside the SDRAM
module. For every auto-refresh cycle, the internal address counter is updated. Accordingly, 4096 times are
required to refresh the entire memory. Before executing the auto-refresh command, all the banks must be in
the IDLE state. In addition, since the precharge for all banks is automatically performed after auto-refresh, no
precharge command is required after auto-refresh.
Self-refresh entry [SELF]:
When this command is input during the IDLE state, the SDRAM module starts
self-refresh operation. After the execution of this command, self-refresh continues while CKE is Low. Since
self-refresh is performed internally and automatically, external refresh operations are unnecessary.
Power down mode entry:
When this command is executed during the IDLE state, the SDRAM module
enters power down mode. In power down mode, power consumption is suppressed by cutting off the initial
input circuit.
Self-refresh exit:
When this command is executed during self-refresh mode, the SDRAM module can exit
from self-refresh mode. After exiting from self-refresh mode, the SDRAM module enters the IDLE state.
Power down exit:
When this command is executed at the power down mode, the SDRAM module can exit
from power down mode. After exiting from power down mode, the SDRAM module enters the IDLE state.
相關(guān)PDF資料
PDF描述
HB52RF1289E2-75B x72 SDRAM Module
HB52RF1289E2 1 GB Registered SDRAM DIMM 128-Mword 】 72-bit, 133 MHz Memory Bus, 2-Bank Module (36 pcs of 64 M 】 4 Components) PC133 SDRAM
HB52RF1289E2 1 GB Registered SDRAM DIMM(1GB 寄存同步DRAM DIMM)
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HB52RD328DC-A6F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module
HB52RD328DC-A6FL 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module
HB52RD328DC-B6F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module
HB52RD328DC-B6FL 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module
HB52RD328DC-F 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256 MB Unbuffered SDRAM S.O.DIMM 32-Mword × 64-bit, 100 MHz Memory Bus, 2-Bank Module (32 pcs of 16 M × 4 components) PC100 SDRAM
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