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參數(shù)資料
| 型號(hào)： | HB52RD328DC |
| 廠商： | Hitachi,Ltd. |
| 英文描述： | 256 MB Unbuffered SDRAM S.O.DIMM(256 MB 未緩沖同步DRAM S.O.DIMM) |
| 中文描述： | 256 MB的無緩沖內(nèi)存的SODIMM（256 MB的未緩沖同步內(nèi)存的SODIMM） |
| 文件頁數(shù)： | 30/68頁 |
| 文件大小： | 885K |
| 代理商： | HB52RD328DC |
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HB52RD328DC-F
30
From PRECHARGE state, command operation
To [DESL], [NOP] or [BST]:
When these commands are executed, the SDRAM module enters the IDLE
state after t
RP
has elapsed from the completion of precharge.
From IDLE state, command operation
To [DESL], [NOP], [BST], [PRE] or [PALL]:
These commands result in no operation.
To [ACTV]:
The bank specified by the address pins and the ROW address is activated.
To [REF], [SELF]:
The SDRAM module enters refresh mode (auto-refresh or self-refresh).
To [MRS]:
The SDRAM module enters the mode register set cycle.
From ROW ACTIVE state, command operation
To [DESL], [NOP] or [BST]:
These commands result in no operation.
To [READ], [READ A]:
A read operation starts. (However, an interval of t
RCD
is required.)
To [WRIT], [WRIT A]:
A write operation starts. (However, an interval of t
RCD
is required.)
To [ACTV]:
This command makes the other bank active. (However, an interval of t
RRD
is required.)
Attempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]:
These commands set the SDRAM module to precharge mode. (However, an interval of
t
RAS
is required.)
From READ state, command operation
To [DESL], [NOP]:
These commands continue read operations until the burst operation is completed.
To [BST]:
This command stops a full-page burst.
To [READ], [READ A]:
Data output by the previous read command continues to be output. After
CE
latency, the data output resulting from the next command will start.
To [WRIT], [WRIT A]:
These commands stop a burst read, and start a write cycle.
To [ACTV]:
This command makes other banks bank active. (However, an interval of t
RRD
is required.)
Attempting to make the currently active bank active results in an illegal command.
To [PRE], [PALL]:
These commands stop a burst read, and the SDRAM module enters precharge mode.
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PDF描述 |
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| HB52RF1289E2-75B | x72 SDRAM Module |
| HB52RF1289E2 | 1 GB Registered SDRAM DIMM 128-Mword 】 72-bit, 133 MHz Memory Bus, 2-Bank Module (36 pcs of 64 M 】 4 Components) PC133 SDRAM |
| HB52RF1289E2 | 1 GB Registered SDRAM DIMM(1GB 寄存同步DRAM DIMM) |
| HB52RF329E2 | 256 MB Registered SDRAM DIMM(256 MB 寄存同步DRAM DIMM) |
| HB52RF648DC-B | 512 MB Unbuffered SDRAM S.O.DIMM 64-Mword 】 64-bit, 133/100 MHz Memory Bus, 2-Bank Module (16 pcs of 32 M 】 8 components) PC133/100 SDRAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HB52RD328DC-A6F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HB52RD328DC-A6FL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HB52RD328DC-B6F | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HB52RD328DC-B6FL | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:x64 SDRAM Module |
| HB52RD328DC-F | 制造商:ELPIDA 制造商全稱:Elpida Memory 功能描述:256 MB Unbuffered SDRAM S.O.DIMM 32-Mword × 64-bit, 100 MHz Memory Bus, 2-Bank Module (32 pcs of 16 M × 4 components) PC100 SDRAM |
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