參數(shù)資料
型號(hào)： GM5060-H
廠商： Electronic Theatre Controls, Inc.
英文描述： GRAPHICS PROCESSING IC PROVIDING HIGH QUALITY IMAGES FOR LCD MONITORS
中文描述： 圖形處理芯片提供高品質(zhì)的圖像液晶顯示器
文件頁(yè)數(shù)： 82/85頁(yè)
文件大?。?/td> 1375K
代理商： GM5060-H
Genesis Microchip
gm5060 / gm5060-H Data Sheet
February 2002
C5060-DAT-01G
74
Table 19. ITU-R BT656 Input Port Timing
Signal
YUV [7:0]
Minimum Setup Requirement (ns)
4.0
Minimum Hold Requirement (ns)
1.0
Table 20. Framestore Output Timing and Adjustments
FSOUT_TIMING ->
Tap 0
(default)
Min
(ns)
1.0
Tap 1
Tap 2
Tap 3
Max
(ns)
4.5
Min
(ns)
0.5
Max
(ns)
3.5
Min
(ns)
0.0
Max
(ns)
2.5
Min
(ns)
-0.5
Max
(ns)
1.5
Propagation delay from FSCLK to FSDATA*
(output)
Propagation delay from FSCLK to FSADDR*
Propagation delay from FSCLK to FSRAS
Propagation delay from FSCLK to FSCAS
Propagation delay from FSCLK to FSWE
Propagation delay from FSCLK to FSDQM1
Propagation delay from FSCLK to FSDQM0
Propagation delay from FSCLK to FSCKE
1.0
1.0
1.0
1.0
1.0
1.0
1.0
4.5
4.5
4.5
4.5
4.5
4.5
4.5
0.5
0.5
0.5
0.5
0.5
0.5
0.5
3.5
3.5
3.5
3.5
3.5
3.5
3.5
0.0
0.0
0.0
0.0
0.0
0.0
0.0
2.5
2.5
2.5
2.5
2.5
2.5
2.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
-0.5
1.5
1.5
1.5
1.5
1.5
1.5
1.5
Note: This table lists the amount of adjustment that can be made to the framestore output propagation delays, in order to
improve setup margin of DRAM write operations at the expense of Hold margin on write operations and setup margin on
read operations. The tap selected is controlled by the FSOUTTIMING parameter in the SYS_TIMING register.
Table 21. Framestore Readback Timing (for all conditions)
FSREAD_TIMING Tap 0
FSOUTTIMING
Tap 1
3.5
0.5
Tap 0
2.5
1.0
Tap 2
4.5
0.0
Tap 3
5.5
-0.5
FSDATA* Minimum Setup (ns)
FSDATA* Minimum Hold (ns)
FSREAD_TIMING Tap 1
FSOUTTIMING
Tap 1
1.5
1.5
Tap 0
0.5
2.0
Tap 2
2.5
1.0
Tap 3
3.5
0.5
FSDATA* Minimum Setup (ns)
FSDATA* Minimum Hold (ns)
FSREAD_TIMING Tap 2
FSOUTTIMING
Tap 1
2.5
1.0
Tap 0
1.5
1.5
Tap 2
3.5
0.5
Tap 3
4.5
0.0
FSDATA* Minimum Setup (ns)
FSDATA* Minimum Hold (ns)
FSREAD_TIMING Tap 3
FSOUTTIMING
Tap 1
4.0
0.0
Tap 0
3.0
0.5
Tap 2
5.0
-0.5
Tap 3
6.0
-1.0
FSDATA* Minimum Setup (ns)
FSDATA* Minimum Hold (ns)
Note: FSOUTTIMING and FSREADTIMING are controlled by the SYS_TIMING register.
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