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參數資料
| 型號： | GM5060-H |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | GRAPHICS PROCESSING IC PROVIDING HIGH QUALITY IMAGES FOR LCD MONITORS |
| 中文描述： | 圖形處理芯片提供高品質的圖像液晶顯示器 |
| 文件頁數： | 33/85頁 |
| 文件大小： | 1375K |
| 代理商： | GM5060-H |
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Genesis Microchip
gm5060 / gm5060-H Data Sheet
February 2002
C5060-DAT-01G
25
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The Ultra-Reliable DVI receiver block of the gm5060 is compliant with DVI1.0 single link
specifications. Digital Visual Interface (DVI) is a standard that uses Transition Minimized
Differential Signaling protocol (TMDS). This block supports an input clock frequency ranging
from 20 MHz to 165 MHz.
Image
Capture
YUV
RealColor
Controls
RGB
Color
Controls
Frame Rate
Conversion
Zoom/
Shrink
Scaling
Triple
ADC
DVI
Rx
ITU656
Decoder
Gamma
Correction
LUT
HDCP
Image
Measurement
Display Timing
& Control
OSD
Frame
Store
Interface
Micro-
processor
(MCU)
Host
Interface
SDRAM
Interface
Analog
RGB
Digital
DVI
Digital YUV
Video
(8-bits)
Serial
Interface
Panel
Interface
.
Clock
Recovery
Input
Color
LUT
(24/48-bits)
Display
Clock
Generation
Figure 18. DVI Block
4.4.1 DVI Receiver Characteristics
Table 12 summarizes the characteristics of the four Receiver Pair inputs. Please note that it is
very important to follow the recommended layout guidelines for these signals. These are
described in "gm5020/5060 System Layout Guidelines" document number C5020-APN-01.
Table 12. DVI Receiver Characteristics
MIN
TYP
MAX
NOTE
DC Characteristics
Differential Input Voltage
Input Common Mode Voltage
150mV
AVDD
–300m V
AVDD
-10mV
1200mV
AVDD
-37mV
AVDD
+10mV
Behavior when Transmitter Disable
AC Characteristics
Input clock frequency
Input differential sensitivity (Peak-to-peak)
Max differential input (peak-to-peak)
Allowable Intra-Pair skew at Receiver
Allowable Inter-Pair skew at Receiver
Worst case differential input clock jitter
tolerance
20 MHz
150mV
165 MHz
1560 mV
250 ps
4.0 ns
188 ps
Input clock = 165 MHz
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