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參數(shù)資料
| 型號： | GF9330-CBP |
| 廠商： | Gennum Corporation |
| 英文描述： | High Performance HDTV/SDTV Deinterlacer |
| 中文描述： | 高性能高清/標清去隔行掃描 |
| 文件頁數(shù)： | 21/42頁 |
| 文件大?。?/td> | 449K |
| 代理商： | GF9330-CBP |
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GF9330 Data Sheet
21 of 42
Proprietary and Confidential
18283 - 4
June 2004
3.5.1.5 Serial Read Operation
All read cycles consist of a command word transmitted to the GF9330 via SDI
followed by a data word transmitted from the GF9330 via SDO. The first 16-bit word
transmitted following a falling transition of SCS is a command word. Several read
cycles may be performed while SCS is LOW. See
Figure 3-7: Read Cycle
.
Figure 3-7: Read Cycle
3.5.2 Host Interface Parallel Mode
The Gennum Parallel Peripheral Interface (GPPI) consists of an 8-bit multiplexed
address/data bus (DAT_IO[7:0]), a chip select pin (CS), a read/write pin (R_W),
and an address/data pin (A_D) as shown in
Figure 3-8: Parallel Peripheral
Interface
.
Figure 3-8: Parallel Peripheral Interface
Data is strobed in/out of the parallel interface on the falling edge of CS. The
GF9330 drives the DAT_IO[7:0] bus when the R_W pin is HIGH and the CS pin is
LOW, otherwise this port is in a high impedance state.
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCLK
SCS
R/W
1
AU
0
R
A0
A1
A2
A3
A4
R
R
R
R
R
R
R
R
SDI
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SDO
D15
D14 D13
D0
D1
D2
D3
D4
D5
D6
D7
D8
D9
D12 D11 D10
tOEN_HI
tOD_HI
tODIS_HI
A_D
CS
DAT_IO[7:0]
R_W
SLAVE (GF9330)
(*) ASIC Pin Name
uC_A/D
uC_CS
uc_ADDR/DAT
uC_R/W
MASTER (uC)
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