參數(shù)資料
型號(hào)： GF9330-CBP
廠商： Gennum Corporation
英文描述： High Performance HDTV/SDTV Deinterlacer
中文描述： 高性能高清/標(biāo)清去隔行掃描
文件頁(yè)數(shù)： 18/42頁(yè)
文件大?。?/td> 449K
代理商： GF9330-CBP
GF9330 Data Sheet
18 of 42
Proprietary and Confidential
18283 - 4
June 2004
3.4 Seamless Interface to External SDRAMs
For all SD video formats, the GF9330 requires two 1M x 24-bit (min.) SDRAM field
buffers.
To pass HD video formats in bypass mode, the GF9330 requires two field buffers,
each implemented with a 1M x 48-bit (min.) SDRAM configuration. To deinterlace
HD formats, the memory requirements increase to a 4M x 48-bit (min) SDRAM
configuration.
3.5 Host Interface
The GF9330 provides both a serial and parallel host interface control port for the
configuration of internal parameters. The GF9330 is also able to operate in stand-
alone mode, with no host interface control. In stand-alone mode, the video
standard (STD[4:0]) and mode of operation (MODE[2:0]) are set using dedicated
pins on the device. These values are loaded into the device on a falling transition
of HOST_EN or after setting RESET LOW.
Both the serial and parallel interfaces share common pins as described in
Table 3-
4: Host Interface Common Pins
.
Table 3-3: SDRAM Configuration
Format
Bypass
Configuration
per Bank
a
Total of
ADDR and
BANK
b
SDRAM properties (per bank)
Recomended
Min.
Freq.
(MHz)
Min.
Access
Time
(ns)
CAS
Latency
SD
Yes
1(1Mx24)
12
90
5.5
3
Micron:
MT48LC4M16A2,
MT48LC8M16A2
No
1(1Mx24
12
90
5.5
3
HD
Yes
1(1Mx48)
12
90
5.5
3
No
1(1Mx48)
14
90
5.5
3
a.There are 2.
b.This is assuming a 8-column structure.
Table 3-4: Host Interface Common Pins
GF9330 PIN NAME
PARALLEL MODE
SERIAL MODE
CS
CHIP select
SCLK - Serial Clock
DAT_IO[0]
Data/address (bit 0)
SDI - Serial data in
DAT_IO[1]
Data/address (bit 1)
(not used)
DAT_IO[2]
Data/address (bit 2)
(not used)
DAT_IO[3]
Data/address (bit 3)
(not used)
DAT_IO[4]
Data/address (bit 4)
(not used)
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