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參數(shù)資料
| 型號： | EC000UM |
| 英文描述： | EC000 Core User＇s Manual (SCM68000) |
| 中文描述： | EC000核心用戶手冊（SCM68000） |
| 文件頁數(shù)： | 83/145頁 |
| 文件大?。?/td> | 829K |
| 代理商： | EC000UM |
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MOTOROLA
EC000 CORE PROCESSOR USER’S MANUAL
3-1
SECTION 3
BUS OPERATION
This section describes control signals and bus operation during data transfer operations,
bus arbitration, and bus error and halt conditions.
NOTE
The terms
assertion and negation are used extensively in this
manual to avoid confusion when describing a mixture of “active-
low” and “active-high” signals. The term
assert or assertion is
used to indicate that a signal is active or true, independently of
whether that level is represented by a high or low voltage. The
term
negate or negation is used to indicate that a signal is inac-
tive or false.
3.1 DATA TRANSFER OPERATIONS
Transfer of data between devices involves the following signals:
1. Address bus (A31–A0)
2. Data bus (D7–D0 and/or D15–D8)
3. Control signals
The address and data buses are separate parallel buses used to transfer data using an
asynchronous bus protocol. Control signals indicate the beginning and type of a bus cycle
as well as the address space and size of the transfer. The selected device then controls the
length of the cycle by terminating it using the control signals. In all bus cycles, the bus master
assumes responsibility for de-skewing the acknowledge and data signals from the slave
device.
The SCM68000 (EC000 core)1 operates in either of two modes: 8-bit or 16-bit mode. The 8-
bit mode is selected by grounding the MODE pin while the 16-bit mode is selected by pulling
the MODE pin to a logic high (see 2.7.4 Mode (MODE) for more information on the MODE
signal).
During operation in the 8-bit mode, all bus cycles use LDSB, and one byte of data is trans-
ferred on data bus bits D7 through D0. UDSB is never asserted, and data bus bits D15
through D8 are undefined. For word or long-word operations, data is transferred in two and
four bus cycles, respectively.
1. The SCM68000 is the name of the Verilog model for the EC000 core. The remainder of this section will
refer to the EC000 core as only the SCM68000.
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Go to: www.freescale.com
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| EC0010-000 | 制造商:TE Connectivity 功能描述:EC0010-000 |
| EC001031 | 制造商:PHOENIX 制造商全稱:PHOENIX CONTACT 功能描述:Header, Nominal current: 12 A, Rated voltage (III/2): 320 V, Assembly: Soldering |
| EC001121 | 制造商:PHOENIX 制造商全稱:PHOENIX CONTACT 功能描述:Plug component, Nominal current: 12 A, Rated voltage (III/2): 320 V, Number of positions: 4, Pitch: 5mm, Connection method: Screw connection, Color: Black, Contact surface: Tin |
| EC001283 | 制造商:PHOENIX 制造商全稱:PHOENIX CONTACT 功能描述:Plug component, Nominal current: 12 A, Rated voltage (III/2): 320 V, Number of positions: 7, Pitch: 5.08 mm, Connection method: Solder/Slip-on connection, Color: green, Contact surface: Tin, Assembly: Direct mounting |
| EC0013-000 | 制造商:TE Connectivity 功能描述:EC0013-000 |
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