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| 型號(hào)： | celeron cpu Mobile Module |
| 廠商： | Intel Corp. |
| 英文描述： | processor Mobile Module Connector 1 (MMC-1) at 466 MHz and 433MHZ(工作頻率466和433兆赫茲帶連接器1處理器) |
| 中文描述： | 移動(dòng)處理器模塊連接器1（MMC管理- 1）在466 MHz和433MHz的（工作頻率466和433兆赫茲帶連接器1處理器） |
| 文件頁(yè)數(shù)： | 23/42頁(yè) |
| 文件大小： | 448K |
| 代理商： | CELERON CPU MOBILE MODULE |
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19
Celeron
Processor Mobile Module MMC-1
at 466 MHz and 433 MHz
processor’s input clock puts the processor in the Deep Sleep
state. PICCLK may be removed in the Sleep state.
4.4.8
Deep Sleep State
The Deep Sleep state is the lowest power mode the
processor can enter while maintaining its context. Stopping
the BCLK input to the processor enters Sleep state. For
proper operation, the BCLK input should be stopped in the
low state.
The processor will return to the Sleep state or the Quick
Start state from the Deep Sleep state when the BCLK input
is restarted. Due to the PLL lock latency, there is a 30-
millisecond delay after the clocks have started before this
state transition happens. PICCLK may be removed in the
Deep Sleep state. PICCLK should be designed to turn on
when BCLK turns on when transitioning out of the Deep
Sleep state.
The input signal restrictions for the Deep Sleep state are the
same as for the Sleep state, except that RESET# assertion
will result in unpredictable behavior.
Table 13. Clock State Characteristics
Processor
Power
Clock
State
Exit Latency
Snooping
System Uses
Normal
N/A
Varies
Yes
Normal program execution
Auto Halt
Stop Grant
1
Approximately 10 bus clocks
1.2W
Yes
S/W controlled entry idle mode
10 bus clocks
1.2W
Yes
H/W controlled entry/exit mobile throttling
Quick Start
Through snoop, to HALT/Grant Snoop
state: immediate
Through STPCLK#, to Normal state:
10 bus clocks
0.5W
Yes
H/W controlled entry/exit mobile throttling
HALT/Grant
Snoop
1
A few bus clocks after the end of
snoop activity.
Not
specified
Yes
Supports snooping in the low power
states
Sleep
To Stop Grant state 10 bus clocks
0.5W
No
H/W controlled entry/exit desktop idle
mode support
Deep Sleep
30 msec
150 mW
No
H/W controlled entry/exit mobile
powered-on suspend support
NOTES:
1.
Intel mobile modules do not support shaded clock control states.
2.
Not 100% tested. Specified at 50
°
C by design/characterization.
4.5
Typical POS/STR Power
Table 14 lists the POS/STR typical power specifications.
Table 14. POS/STR Power
State
Typical MMC-1 Power
POS
0.475W
STR
0.018W
NOTE:
These are average values of measurement and are guidelines only.
4.6
Electrical Requirements
The following section provides information on the electrical
requirements for the Celeron processor mobile module
MMC-1.
4.6.1
DC Requirements
Table 15 provides DC power supply design criteria.
Table 15. Power Supply Design Specifications
1
Parameter
Symbol
Min
Nom
Max
Unit
Notes
V
DC 2,3
DC Input Voltage
5.0
12.0
21.0
V
I
DC
DC Input Current
0.1
0.9
3.5
A
I
DC-Surge
Maximum Surge Current for V
DC
17.3
A
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