- 您現在的位置：買賣IC網 > PDF目錄379876 > celeron cpu Mobile Module (Intel Corp.) processor Mobile Module Connector 1 (MMC-1) at 466 MHz and 433MHZ(工作頻率466和433兆赫茲帶連接器1處理器) PDF資料下載
參數資料
| 型號： | celeron cpu Mobile Module |
| 廠商： | Intel Corp. |
| 英文描述： | processor Mobile Module Connector 1 (MMC-1) at 466 MHz and 433MHZ(工作頻率466和433兆赫茲帶連接器1處理器) |
| 中文描述： | 移動處理器模塊連接器1（MMC管理- 1）在466 MHz和433MHz的（工作頻率466和433兆赫茲帶連接器1處理器） |
| 文件頁數： | 14/42頁 |
| 文件大?。?/td> | 448K |
| 代理商： | CELERON CPU MOBILE MODULE |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁當前第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁
10
Celeron
Processor Mobile Module MMC-1
at 466 MHz and 433 MHz
3.1.7
Voltages (39 Signals)
Table 7 lists the voltage signal definitions.
Table 7. Voltage Descriptions
Name
Type
Number
of Pins
Description
V_DC
I
10
DC Input:
5V-21V.
V_3S
I
20
SUSB# controlled 3.3V:
V_3S is supplied by the system electronics. This is a 3.3V power
supply that is turned off during suspend during system states STR, STD, and Soff.
V_5
I
1
SUSC# controlled 5V:
Power managed 5V supply.
An output of the voltage regulator on the
system electronics. This rail is off during STD and Soff.
V_3
I
5
SUSC# controlled 3.3V:
Power managed 3.3V supply.
An output of the voltage regulator on
the system electronics. This rail is off during STD and Soff.
V_CPUIO
O
3
Processor I/O Ring:
Powers the processor interface signals such as the PIIX4E/M open-drain
pullups for the processor/PIIX4E/Msideband signals and the CKDM66-M clock source.
3.1.8
JTAG (7 Signals)
Table 8 lists the JTAG signals, which the system electronics
can use to implement a JTAG chain and ITP port, if desired.
The JTAG signals provided cannot be used as an ITP port,
since the ITP interface has changed between the
generations of the mobile Pentium processor and the mobile
Celeron processor.
Table 8. JTAG Pins
Name
Type
Voltage
Description
TDO
O
V_CPUIO
JTAG Test Data Out:
Serial output port. TAP instructions and data is shifted out of the
processor from this port.
TDI
I
V_CPUIO
JTAG Test Data In:
Serial input port. TAP instructions and data is shifted into the
processor from this port.
TMS
I
V_CPUIO
JTAG Test Mode Select:
Controls the TAP controller change sequence.
TCLK
I
V_CPUIO
JTAG Test Clock:
Testability clock for clocking the JTAG boundary scan sequence.
TRST#
I
V_CPUIO
JTAG Test Reset:
Asynchronously resets the TAP controller in the processor.
ITP(1:0)
ITP1
ITP0
O
I
V_CPUIO
Debug Port Signals:
These signals are not used in the Celeron processor mobile
module MMC-1and should not be connected.
NOTE:
DBREST# (reset target system) on the ITP debug port can be “l(fā)ogically ANDed” with VR_PWRGD TO PIIX4E/M’s PWROK.
相關PDF資料 |
PDF描述 |
|---|---|
| celeron CPU with Mobile Module | processor Mobile Module Connector 2 (MMC-2) at 466 MHz and 433MHZ(工作頻率466和433兆赫茲帶連接器2處理器) |
| Celeron Processor with mobile | Celeron Processor Mobile Module MMC-1 at 400 MHz, 366 MHz, 333 MHz, and 300 MHz(工作頻率400,366,333,300和266兆赫茲帶移動模塊和連接器1處理器) |
| celeron processor | 32 bit Celeron Processor Mobile Module(32 位帶移動模塊處理器) |
| CEM11C2 | Dual Enhancement Mode Field Effect Transistor (N and P Channel) |
| CEM2005 | Dual Enhancement Mode Field Effect Transistor(N and Channel) |
相關代理商/技術參數 |
參數描述 |
|---|---|
| CELF001001J1 | 制造商:Panasonic Industrial Company 功能描述:FILTER |
| CELHK11-1REC5-59-3.00-AV-01-V | 功能描述:CIRCUIT BRKR MAG-HYDR LEVER 3A 制造商:sensata technologies/airpax 系列:CEL 零件狀態(tài):有效 斷路器類型:磁性（液力延遲） 額定電流:3A 額定電壓 - AC:- 額定電壓 - DC:- 極數:2 致動器類型:搖臂 照明:- 照明電壓（標稱值）:- 安裝類型:面板安裝 標準包裝:1 |
| CELHK11-1REC5-59-35.0-AV-01-V | 功能描述:CIRCUIT BRKR MAG-HYDR LEVER 35A 制造商:sensata technologies/airpax 系列:CEL 零件狀態(tài):有效 斷路器類型:磁性（液力延遲） 額定電流:35A 額定電壓 - AC:- 額定電壓 - DC:- 極數:2 致動器類型:搖臂 照明:- 照明電壓（標稱值）:- 安裝類型:面板安裝 標準包裝:1 |
| CELHK11-1REC5-71165-10-V | 功能描述:CIRCUIT BREAKER MAG-HYDR LEVER 制造商:sensata technologies/airpax 系列:* 零件狀態(tài):有效 標準包裝:1 |
| CELHK11-1REC5-71165-11-V | 功能描述:CIRCUIT BREAKER MAG-HYDR LEVER 制造商:sensata technologies/airpax 系列:* 零件狀態(tài):有效 標準包裝:1 |
發(fā)布緊急采購，3分鐘左右您將得到回復。
