- 鎮ㄧ従(xi脿n)鍦ㄧ殑浣嶇疆锛�璨疯常IC缍�(w菐ng) > PDF鐩寗1895 > AD9974BBCZRL (Analog Devices Inc)IC CCDSP DUAL 14BIT 100-CSPBGA PDF璩囨枡涓嬭級
鍙冩暩(sh霉)璩囨枡
| 鍨嬭櫉锛� | AD9974BBCZRL |
| 寤犲晢锛� | Analog Devices Inc |
| 鏂囦欢闋佹暩(sh霉)锛� | 8/52闋� |
| 鏂囦欢澶�?銆�?/td> | 0K |
| 鎻忚堪锛� | IC CCDSP DUAL 14BIT 100-CSPBGA |
| 妯�(bi膩o)婧�(zh菙n)鍖呰锛� | 1 |
| 椤炲瀷锛� | CCD 淇¤櫉铏曠悊鍣�锛�14 浣� |
| 杓稿叆椤炲瀷锛� | 閭忚集 |
| 杓稿嚭椤炲瀷锛� | 閭忚集 |
| 鎺ュ彛锛� | 3 绶氫覆鍙� |
| 闆绘祦 - 闆绘簮锛� | 55mA |
| 瀹夎椤炲瀷锛� | 琛ㄩ潰璨艰 |
| 灏佽/澶栨锛� | 100-LFBGA锛孋SPBGA |
| 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 | 100-CSBGA锛�9x9锛� |
| 鍖呰锛� | 妯�(bi膩o)婧�(zh菙n)鍖呰 |
| 鍏跺畠鍚嶇ū锛� | AD9974BBCZRLDKR |
绗�1闋�绗�2闋�绗�3闋�绗�4闋�绗�5闋�绗�6闋�绗�7闋�鐣�(d膩ng)鍓嶇8闋�绗�9闋�绗�10闋�绗�11闋�绗�12闋�绗�13闋�绗�14闋�绗�15闋�绗�16闋�绗�17闋�绗�18闋�绗�19闋�绗�20闋�绗�21闋�绗�22闋�绗�23闋�绗�24闋�绗�25闋�绗�26闋�绗�27闋�绗�28闋�绗�29闋�绗�30闋�绗�31闋�绗�32闋�绗�33闋�绗�34闋�绗�35闋�绗�36闋�绗�37闋�绗�38闋�绗�39闋�绗�40闋�绗�41闋�绗�42闋�绗�43闋�绗�44闋�绗�45闋�绗�46闋�绗�47闋�绗�48闋�绗�49闋�绗�50闋�绗�51闋�绗�52闋�
AD9974
Rev. A | Page 16 of 52
12
43
H1 TO H4 PROGRAMMABLE LOCATIONS:
1H1 RISING EDGE.
2H1 FALLING EDGE.
3H2 RISING EDGE.
4H2 FALLING EDGE.
H2, H4
H1, H3
0
59
55
-0
19
Figure 19. HCLK Mode 2 Operation
12
4
3
H1 TO H4 PROGRAMMABLE LOCATIONS:
1H1 RISING EDGE.
2H1 FALLING EDGE.
3H3 RISING EDGE.
4H3 FALLING EDGE.
H3
H1
H2
H4
05
95
5-
0
20
Figure 20. HCLK Mode 3 Operation
NOTES
1. ALL SIGNAL EDGES ARE FULLY PROGRAMMABLE TO ANY OF THE 64 POSITIONS WITHIN ONE PIXEL PERIOD.
TYPICAL POSITIONS FOR EACH SIGNAL ARE SHOWN. HCLK MODE 1 IS SHOWN.
2. CERTAIN POSITIONS SHOULD BE AVOIDED FOR EACH SIGNAL, SHOWN ABOVE AS INHIBIT REGIONS.
3. IF A SETTING IN THE INHIBIT REGION IS USED, AN UNSTABLE PIXEL SHIFT CAN OCCUR IN THE HBLK LOCATION OR AFE PIPELINE.
P[0]
CLI
RG
P[64] = P[0]
CCD
SIGNAL
P[32]
P[16]
P[48]
POSITION
H2
RGr[0]
RGf[16]
SHD
SHDLOC[0]
H1
H1r[0]
H1f[32]
tS1
SHP
SHPLOC[32]
DOUTPHASEP
DATAPHASEP[32]
tDOUTINH
tSHDINH
tSHPINH
05
95
5-
0
21
Figure 21. High Speed Timing Default Locations
鐩搁棞(gu膩n)PDF璩囨枡 |
PDF鎻忚堪 |
|---|---|
| AD9979BCPZRL | IC PROCESSOR CCD 14BIT 48-LFCSP |
| AD9980KSTZ-95 | IC INTERFACE 8BIT ANALOG 80LQFP |
| AD9981KSTZ-95 | IC INTERFACE 10BIT ANALOG 80LQFP |
| AD9983AKSTZ-170 | IC DISPLAY 8BIT 170MSPS 80LQFP |
| AD9985KSTZ-140 | IC INTERFACE 8BIT 140MSPS 80LQFP |
鐩搁棞(gu膩n)浠ｇ悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉) |
鍙冩暩(sh霉)鎻忚堪 |
|---|---|
| AD9975 | 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:Broadband Modem Mixed-Signal Front End |
| AD9975ABST | 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTEB | 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTRL | 鍒堕€犲晢:AD 鍒堕€犲晢鍏ㄧū:Analog Devices 鍔熻兘鎻忚堪:Broadband Modem Mixed-Signal Front End |
| AD9975BST | 鍒堕€犲晢:Analog Devices 鍔熻兘鎻忚堪:Mixed Signal Front End 48-Pin LQFP 鍒堕€犲晢:Rochester Electronics LLC 鍔熻兘鎻忚堪:10 BIT ANALOG FRONT END WITH HALF DUPLEX - Tape and Reel |
鐧�(f膩)甯冪穵鎬ラ噰璩硷紝3鍒嗛悩宸﹀彸鎮ㄥ皣寰楀埌鍥炲京(f霉)銆�
