參數(shù)資料
型號(hào)： AD9974BBCZRL
廠商： Analog Devices Inc
文件頁數(shù)： 5/52頁
文件大?。?/td> 0K
描述： IC CCDSP DUAL 14BIT 100-CSPBGA
標(biāo)準(zhǔn)包裝： 1
類型： CCD 信號(hào)處理器，14 位
輸入類型： 邏輯
輸出類型： 邏輯
接口： 3 線串口
電流 - 電源： 55mA
安裝類型： 表面貼裝
封裝/外殼： 100-LFBGA，CSPBGA
供應(yīng)商設(shè)備封裝： 100-CSBGA（9x9）
包裝： 標(biāo)準(zhǔn)包裝
其它名稱： AD9974BBCZRLDKR
AD9974
Rev. A | Page 13 of 52
TERMINOLOGY
Differential Nonlinearity (DNL)
An ideal ADC exhibits code transitions that are exactly 1 LSB
apart. DNL is the deviation from this ideal value. Therefore,
every code must have a finite width. No missing codes guaranteed
to 14-bit resolution indicates that all 16,384 codes, each for its
respective input, must be present over all operating conditions.
Peak Nonlinearity
Peak nonlinearity, a full signal chain specification, refers to the
peak deviation of the output of the AD9974 from a true straight
line. The point used as zero scale occurs 0.5 LSB before the first
code transition. Positive full scale is defined as a level 1 LSB
and 0.5 LSB beyond the last code transition. The deviation is
measured from the middle of each particular output code to the
true straight line. The error is then expressed as a percentage
of the 2 V ADC full-scale signal. The input signal is always
appropriately gained up to fill the ADC full-scale range.
Total Output Noise
The rms output noise is measured using histogram techniques.
The standard deviation of the ADC output codes is calculated
in LSB and represents the rms noise level of the total signal
chain at the specified gain setting. The output noise can be
converted to an equivalent voltage using the relationship
1 LSB = (ADC Full Scale/2n Codes)
where n is the bit resolution of the ADC. For the AD9974,
1 LSB is approximately 122.0 μV.
Linearity Mismatch
The linearity mismatch is calculated by taking the difference in
INL of the two channels at Input X, and then expressing the
difference as a percentage of the output code at X. The values
given in Table 2 are obtained over the range of 116 and
maximum of the output code. The general trend is for the
linearity mismatch to decrease as the output approaches the
maximum code, as shown in Figure 8.
)
(
)
(
)
(
(%)
X
Code
Output
X
B
INL
X
A
INL
Mismatch
Linearity
=
CHANNEL B
INPUT VOLTAGE
OU
TP
U
T
C
O
D
E
(L
S
B
)
XFS
INL A(X)
INL B(X)
OUTPUT (X)
MAX/16
0
MAX
CHANNEL A
IDEAL
0
59
55
-00
4
Figure 13. Linearity Mismatch Definition
Power Supply Rejection (PSR)
The PSR is measured with a step change applied to the supply
pins. The PSR specification is calculated from the change in the
data outputs for a given step change in the supply voltage.
Crosstalk
The crosstalk is measured while applying a full-scale step to
one channel and measuring the interference on the opposite
channel.
×
=
384
,
16
)
(
log
20
)
dB
(
LSB
ce
Interferen
Crosstalk
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