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參數(shù)資料
| 型號： | AD9974BBCZRL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CCDSP DUAL 14BIT 100-CSPBGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | CCD 信號處理器，14 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 電流 - 電源： | 55mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LFBGA，CSPBGA |
| 供應(yīng)商設(shè)備封裝： | 100-CSBGA（9x9） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD9974BBCZRLDKR |
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AD9974
Rev. A | Page 14 of 52
THEORY OF OPERATION
CCD
SERIAL
INTERFACE
DOUT_A
DOUT_B
DIGITAL IMAGE
PROCESSING
ASIC
V DRIVER
HD_A, VD_A,
HD_B, VD_B
CLI_A, CLI_B
V1 > Vx, VSG1 > VSGx, SUBCK
H1_A TO H4_A, RG_A
H1_B TO H4_B, RG_B
AD9974
INTEGRATED
AFE + TD
CCDINP_A
CCDINM_A
05
95
5-
01
4
CCDINP_B
CCDINM_B
Figure 14. Typical Application
Figure 14 shows the typical system block diagram for the AD9974.
The charge-coupled device (CCD) output is processed by the
analog front-end (AFE) circuitry of the AD9974, consisting of a
CDS, VGA, black level clamp, and ADC. The digitized pixel
information is sent to the digital image processor chip, which
performs the postprocessing and compression. To operate the
CCD, all CCD timing parameters are programmed into the
AD9974 from the system ASIC through the 3-wire serial
interface. From the system master clock, CLI_X, which is provided
by the image processor or external crystal, the AD9974 generates
the horizontal clocks of the CCD and all internal AFE clocks.
All AD9974 clocks are synchronized with VD and HD inputs.
All of the AD9974 horizontal pulses (CLPOB, PBLK, and
HBLK) are programmed and generated internally.
The H-drivers for H1 to H4 and RG are included in the
AD9974, allowing these clocks to be directly connected to the
CCD. An H-driver voltage of 3 V is supported in the AD9974.
vertical counter dimensions for the AD9974. All internal horizontal
and vertical clocking is controlled by these counters, which specify
line and pixel locations. Maximum HD length is 8191 pixels per
line, and maximum VD length is 8191 lines per field.
13-BIT HORIZONTAL = 8192 PIXELS MAX
13-BIT VERTICAL = 8192 LINES MAX
MAXIMUM COUNTER DIMENSIONS
0
59
55-
0
15
Figure 15. Vertical and Horizontal Counters
VD
HD
MAX VD LENGTH IS 8192 LINES
CLI
MAX HD LENGTH IS 8192 PIXELS
05
95
5-
01
6
Figure 16. Maximum VD/HD Dimensions
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9975 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTEB | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975ABSTRL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Broadband Modem Mixed-Signal Front End |
| AD9975BST | 制造商:Analog Devices 功能描述:Mixed Signal Front End 48-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:10 BIT ANALOG FRONT END WITH HALF DUPLEX - Tape and Reel |
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