參數(shù)資料
型號: XRT83L34IV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述: DATACOM, PCM TRANSCEIVER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, TQFP-128
文件頁數(shù): 68/82頁
文件大小: 447K
代理商: XRT83L34IV
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.3.4
65
D3
MCLKRATE
Master clock Rate Select:
The state of this bit programs the
Master Clock Synthesizer to generate the T1/J1 or E1 clock.
The Master Clock Synthesizer will generate the E1 clock when
MCLKRATE = “0”, and the T1/J1 clock when MCLKRATE =
“1”.
R/W
0
D2
RXMUTE
Receive Output Mute:
Writing a “1” to this bit, mutes receive
outputs at RPOS/RDATA and RNEG/LCV pins to a “0” state for
any channel that detects an RLOS condition.
N
OTE
:
RCLK is not muted.
R/W
0
D1
EXLOS
Extended LOS:
Writing a “1” to this bit extends the number of
zeros at the receive input of each channel before RLOS is
declared to 4096 bits. Writing a “0” reverts to the normal mode
(175+75 bits for T1 and 32 bits for E1).
R/W
0
D0
ICT
In-Circuit-Testing:
Writing a “1” to this bit configures all the
output pins of the chip in high impedance mode for In-Circuit-
Testing. Setting the ICT bit to “1” is equivalent to connecting
the Hardware ICT pin 88 to ground.
R/W
0
T
ABLE
37: M
ICROPROCESSOR
R
EGISTER
#66, B
IT
D
ESCRIPTION
R
EGISTER
A
DDRESS
1000010
N
AME
F
UNCTION
R
EGISTER
T
YPE
R
ESET
V
ALUE
B
IT
#
D7
GAUGE1
Wire Gauge Selector Bit 1:
This bit together with bit D6 are used to select wire gauge size
as shown in the table below.
R/W
0
D6
GAUGE0
Wire Gauge Selector Bit 0:
See bit D7.
R/W
0
D5
TXONCNTL
Transmit On Control:
In
Host
mode, setting this bit to “1” transfers the control of the
Transmit On/Off function to the TXON_n
Hardware
control
pins.
N
OTE
:
This provides a faster On/Off capability for redundancy
application.
R/W
0
D4
TERCNTL
Termination Control.
In
Host
mode, setting this bit to “1” transfers the control of the
RXTSEL to the RXTSEL
Hardware
control pin.
N
OTE
:
This provides a faster On/Off capability for redundancy
application.
R/W
0
T
ABLE
36: M
ICROPROCESSOR
R
EGISTER
#65, B
IT
D
ESCRIPTION
GAUGE1
0
1
1
0
GAUGE0
0
1
0
1
Wire Size
22 and 24 Gauge
26 Gauge
24 Gauge
22 Gauge
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