參數(shù)資料
型號(hào)： XRT83L34IV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述： DATACOM, PCM TRANSCEIVER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, TQFP-128
文件頁(yè)數(shù)： 22/82頁(yè)
文件大?。?/td> 447K
代理商： XRT83L34IV
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.3.4
19
FUNCTIONAL DESCRIPTION
The XRT83L34 is a fully integrated four-channel long-haul and short-haul transceiver intended for T1, J1 or E1
systems. Simplified block diagrams of the device are shown in
Figure 1
,
Host
mode and
Figure 2
,
Hardware
mode. The XRT83L34 can receive signals that have been attenuated from 0 to 36dB at 772kHz (0 to 6000 feet
cable loss) for T1 and from 0 to 43dB at 1024kHz for E1 systems.
In T1 applications, the XRT83L34 can generate five transmit pulse shapes to meet the short-haul Digital Cross-
connect (DSX-1) template requirement as well as four CSU Line Build-Out (LBO) filters of 0dB, -7.5dB, -15dB
and -22.5dB as required by FCC rules. It also provides programmable transmit output pulse generators for
each channel that can be used for output pulse shaping allowing performance improvement over a wide variety
of conditions. The operation and configuration of the XRT83L34 can be controlled through a parallel
microprocessor
Host
interface or, by
Hardware
control.
MASTER CLOCK GENERATOR
Using a variety of external clock sources, the on-chip frequency synthesizer generates the T1 (1.544MHz) or
E1 (2.048MHz) master clocks necessary for the transmit pulse shaping and receive clock recovery circuit.
There are two master clock inputs MCLKE1 and MCLKT1. In systems where both T1 and E1 master clocks are
available these clocks can be connected to the respective pins. All channels of a given XRT83L34 must be
operated at the same clock rate, either T1, E1 or J1 modes.
In systems that have only one master clock source available (E1 or T1), that clock should be connected to both
MCLKE1 and MCLKT1 inputs for proper operation. T1 or E1 master clocks can be generated from 8kHz,
16kHz, 56kHz, 64kHz, 128kHz and 256kHz external clocks under the control of CLKSEL[2:0] inputs according
to
Table 1
.
N
OTE
:
EQC[4:0] determine the T1/E1 operating mode. See
Table 5
for details.
F
IGURE
4. T
WO
I
NPUT
C
LOCK
S
OURCE
F
IGURE
5. O
NE
I
NPUT
C
LOCK
S
OURCE
MCLKE1
MCLKT1
MCLKOUT
1.544MHz
or
2.048MHz
2.048MHz
+/-50ppm
1.544MHz
+/-50ppm
Two Input Clock Sources
MCLKE1
MCLKT1
MCLKOUT
1.544MHz
or
2.048MHz
One Input Clock Source
Input Clock Options
8kHz
16kHz
56kHz
64kHz
128kHz
256kHz
1.544MHz
2.048MHz
相關(guān)PDF資料
PDF描述
XRT83SH314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH314_0610 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH314IB 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH38 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH38_0609 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT83L34IV-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT83L34IVTR 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83L34IVTR-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83L38 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
XRT83L38_07 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
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