參數(shù)資料
型號： XRT83L34IV
廠商： EXAR CORP
元件分類： 數(shù)字傳輸電路
英文描述： QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述： DATACOM, PCM TRANSCEIVER, PQFP128
封裝： 14 X 20 MM, 1.40 MM HEIGHT, TQFP-128
文件頁數(shù)： 45/82頁
文件大?。?/td> 447K
代理商： XRT83L34IV
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
REV. P1.3.4
PRELIMINARY
42
MICROPROCESSOR PARALLEL INTERFACE
XRT83L34 is equipped with a microprocessor interface for easy device configuration. The parallel port of the
XRT83L34 is compatible with both Intel and Motorola address and data buses. The XRT83L34 has an 8-bit
address A[7:0] input and 8-bit bi-directional data bus D[7:0]. The signals required for a generic microprocessor
to access the internal registers are described in
Table 16
.
T
ABLE
16: M
ICROPROCESSOR
INTERFACE
SIGNAL
DESCRIPTION
D[7:0]
Data Input (Output):
8 bits bi-directional Read/Write data bus for register access.
A[7:0]
Address Input:
8 bit address to select internal register location.
μ
PTS1
μ
PTS2
Microprocessor Type Select:
μ
PCLK
Microprocessor Clock Input
: Input clock for synchronous microprocessor operation. Maximum
clock speed is 54MHz. This pin is internally pulled “Low” for asynchronous microprocessor operation
when no clock is present.
ALE_AS
Address Latch Input (Address Strobe):
-Intel bus timing, the address inputs are latched into the internal register on the falling edge of ALE.
-Motorola bus timing, the address inputs are latched into the internal register on the falling edge of
AS.
CS
Chip Select Input:
This signal must be “Low” in order to access the parallel port.
RD_DS
Read Input (Data Strobe):
-Intel bus timing, a “Low” pulse on RD selects a read operation when CS pin is “Low”.
-Motorola bus timing, a “Low” pulse on DS indicates a read or write operation when CS pin is “Low”.
WR_R/W
Write Input (Read/Write):
-Intel bus timing, a “Low” pulse on WR selects a write operation when CS pin is “Low”.
-Motorola bus timing, a “High” pulse on R/W selects a read operation and a “Low” pulse on R/W
selects a write operation when CS pin is “Low”.
RDY_DTACK
Ready Output (Data Transfer Acknowledge Output):
-Intel bus timing, RDY is asserted “High” to indicate the XRT83L34 has completed a read or write
operation.
-Motorola bus timing, DTACK is asserted “Low” to indicate the XRT83L34 has completed a read or
write operation.
INT
Interrupt Output:
This pin is asserted “Low” to indicate an interrupt caused by an alarm condition in
the device status registers. The activation of this pin can be blocked by setting the GIE bit to “0” in the
Command Control register.
μ
PTS2
μ
PTS1
0
0
0
1
1
0
μ
P Type
68HC11, 8051, 80C188 (async.)
Motorola 68K (async.)
Intel x86 (sync.)
Intel i960, Motorola 860 (sync.)
1
1
相關(guān)PDF資料
PDF描述
XRT83SH314 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH314_0610 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH314IB 14-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH38 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
XRT83SH38_0609 8-CHANNEL T1/E1/J1 SHORT-HAUL LINE INTERFACE UNIT
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT83L34IV-F 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
XRT83L34IVTR 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83L34IVTR-F 功能描述:外圍驅(qū)動(dòng)器與原件 - PCI RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
XRT83L38 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
XRT83L38_07 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報(bào)價(jià)

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*