參數(shù)資料
型號: XRT83L34IV
廠商: EXAR CORP
元件分類: 數(shù)字傳輸電路
英文描述: QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
中文描述: DATACOM, PCM TRANSCEIVER, PQFP128
封裝: 14 X 20 MM, 1.40 MM HEIGHT, TQFP-128
文件頁數(shù): 20/82頁
文件大?。?/td> 447K
代理商: XRT83L34IV
XRT83L34
QUAD T1/E1/J1 LH/SH TRANSCEIVER WITH CLOCK RECOVERY AND JITTER ATTENUATOR
PRELIMINARY
REV. P1.3.4
17
TERSEL0
TERSEL1
113
112
I
Termination Impedance Select pin 0
Termination Impedance Select pin 1
In the
Hardware mode
and in the
internal termination mode
(TXTSEL=”1”
and RXTSEL=”1”), TERSEL[1:0] control the transmit and receive termination
impedance according to the following table.
In the
internal termination mode
, the receiver termination of each receiver
is realized completely by internal resistors or by the combination of internal
and one fixed external resistor (see description of RXRES[1:0] pins).
In the
internal termination mode
the transformer ratio of 1:2 and 1:1 is
required for transmitter and receiver respectively with the transmitter output
AC coupled to the transformer.
N
OTES
:
1.
This pin is internally pulled "Low" with a 50k
resistor.
2.
In
Hardware Mode
all channels share the same TERSEL control
function.
ICT
120
I
In-Circuit Testing (active "Low"):
When this pin is tied “Low”, all output pins are forced to a “High” impedance
state for in-circuit testing.
Pulling RESET and ICT pins “Low” simultaneously will put the chip in factory
test mode. This condition should not be permitted during normal operation.
N
OTE
:
Internally pulled “High” with a 50k
resistor.
S
IGNAL
N
AME
P
IN
#
T
YPE
D
ESCRIPTION
0
1
1
0
1
1
0
0
100
110
75
120
Termination
TERSEL1
TERSEL0
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