參數(shù)資料
型號： W28J320TT90L
廠商： WINBOND ELECTRONICS CORP
元件分類： PROM
英文描述： 2M X 16 FLASH 2.7V PROM, 90 ns, PDSO48
封裝： 12 X 20 MM, TSOP-48
文件頁數(shù)： 47/48頁
文件大小： 1513K
代理商： W28J320TT90L
W28J320B/T
- 8 -
7. PRINCIPLES OF OPERATION
The W28J320B/T flash memory includes an on-chip WSM to manage block erase, full chip erase,
word/byte write and lock-bit configuration functions. It allows for: fixed power supplies during block
erase, full chip erase, word/byte write and lock-bit configuration, and minimal processor overhead with
RAM-like interface timings.
After initial device power-up or return from reset mode (see Bus Operations Section), the device
defaults to read array mode. Manipulation of external memory control pins allow array read, standby
and output disable operations.
Status register and identifier codes can be accessed through the CUI independent of the VPP voltage.
High voltage on VPP enables successful block erase, full chip erase, word/byte write and lock-bit
configurations. All functions associated with altering memory contents (block erase, full chip erase,
word/byte write, lock-bit configuration, status and identifier codes) are accessed via the CUI and
verified through the status register.
Commands are written using standard microprocessor write timings. The CUI contents serve as input
to the WSM, which controls the block erase, full chip erase, word/byte write and lock-bit configuration.
The internal algorithms are regulated by the WSM, including pulse repetition, internal verification and
margining of data. Addresses and data are internally latched during write cycles. Writing the
appropriate command outputs array data, accesses the identifier codes or outputs status register
data.
Interface software that initiates and polls progress of block erase, full chip erase, word/byte write and
lock-bit configuration can be stored in any block. This code is copied to and executed from system
RAM during flash memory updates. After successful completion, reads are again possible via the
Read Array command. Block erase suspend allows system software to suspend a block erase to
read/write data from/to blocks other than that which is suspend. Word/byte write suspend allows
system software to suspend a word/byte write to read data from any other flash memory array
location.
Data Protection
When VPP ≤ VPPLK, memory contents cannot be altered. The CUI, with two-step block erase, full chip
erase, word/byte write or lock-bit configuration command sequences, provides protection from
unwanted operations even when high voltage is applied to VPP. All write functions are disabled when
VDD is below the write lockout voltage VLKO or when #RESET is at VIL. The device's block locking
capability provides additional protection from inadvertent code or data alteration by gating block erase,
full chip erase and word/byte write operations. Refer to Table 5 for write protection alternatives.
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