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參數(shù)資料
| 型號： | W28J320TT90L |
| 廠商： | WINBOND ELECTRONICS CORP |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 2.7V PROM, 90 ns, PDSO48 |
| 封裝： | 12 X 20 MM, TSOP-48 |
| 文件頁數(shù)： | 18/48頁 |
| 文件大?。?/td> | 1513K |
| 代理商： | W28J320TT90L |
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W28J320B/T
Publication Release Date: April 11, 2003
- 25 -
Revision A4
Bus Operation Command
Comments
Write
Read Status
Register
Data = 70H
Addr = X
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Write
Setup
Word/Byte
Write
Data = 40H or 10H
Addr = X
Write
Word/Byte
Write
Data = Data to Be Written
Addr = Location to Be
written
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent word/byte writes.
SR full status check can be done after each word/byte
write, or after a sequence of word/byte writes.
Write FFH after the last word/byte write operation to
place device in read array mode.
Start
Write 70H
SR.7=
Write 40H or 10H
Read Status
Register
SR.7=
Full Status
Check if Desired
Word/Byte Write
Complete
Read Status
Register
Write Word/Byte
1
0
1
Data and Adddress
Suspend
Word/Byte
Write Loop
No
Yes
Write
Suspend Word/Byte
0
Full STATUS CHECK PROCEDURE
Read Status Register
Data(See Above)
SR.3=
SR.1=
SR.4=
0
1
Vpp Range Error
Device Protect Error
Word/Byte
Write Error
Word/Byte Write
Successfully
Bus Operation Command
Comments
Standby
Check SR.3
1 =
VPP Error Detect
Standby
Check SR.1
1 = Device Protect Detect
Standby
Check SR.4
1 = Data Write Error
SR.4, SR.3 and SR.1 are only cleared by the Clear
Status Register command in cases where multiple
locations are written before full status is checked.
If error is detected, clear the Status Register before
attempting retry or other error recovery.
Figure 8. Automated Word/Byte Write Flowchart
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