參數(shù)資料
型號(hào): W28J320TT90L
廠商: WINBOND ELECTRONICS CORP
元件分類: PROM
英文描述: 2M X 16 FLASH 2.7V PROM, 90 ns, PDSO48
封裝: 12 X 20 MM, TSOP-48
文件頁(yè)數(shù): 16/48頁(yè)
文件大小: 1513K
代理商: W28J320TT90L
W28J320B/T
Publication Release Date: April 11, 2003
- 23 -
Revision A4
Bus Operation
Command
Comments
Write
Read
Status
Register
Data = 70H
Addr = X
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Write
Erase
Setup
Data = 20H Addr = X
Write
Erase
Confirm
Data = D0H
Addr = Within Block to
be Erased
Read
Status Register Data
Standby
Check SR.7
1 = WSM Ready
0 = WSM Busy
Repeat for subsequent block erasures. Full status
check can be done after each block erase or after a
sequence of block erasures. Write FFH after the last
operation to place device in read array mode.
Start
Write 70H
SR.7=
Write 20H
Read Status
Register
SR.7=
Full Status
Check if Desired
Block Erase
Complete
Read Status
Register
Write D0H,
Block Address
1
0
1
0
Suspend Block
Suspend
Block Erase
Erase Loop
No
Yes
Full STATUS CHECK PROCEDURE
Read Status Register
Data(See Above)
SR.3=
SR.1=
SR.4,5=
SR.5=
Block Erase Sucessfully
0
1
Vpp Range Error
Device Protect Error
Command Sequence
Block Erase Error
Error
Bus Operation
Command
Comments
Standby
Check SR.3
1 =
VPP Error Detect
Standby
Check SR.1
1 = Device Protect
Detect
Standby
Check SR.4, 5
Both 1 = Command
Sequence Error
Standby
Check SR.5
1 = Block Erase Error
SR.5, SR.4, SR.3 and SR.1 are only cleared by the
Clear Status Register Command in cases where
multiple blocks are erased before full status is checked.
If error is detected, clear the Status Register before
attempting retry or other error recovery.
Figure 6. Automated Block Erase Flowchart
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